From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCH REPOST v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC. Date: Fri, 31 May 2019 20:52:19 +0200 Message-ID: <20190531185219.GD23821@lunn.ch> References: <1559327423-13001-1-git-send-email-sagar.kadam@sifive.com> <1559327423-13001-4-git-send-email-sagar.kadam@sifive.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1559327423-13001-4-git-send-email-sagar.kadam@sifive.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+glpr-linux-riscv=m.gmane.org@lists.infradead.org To: Sagar Shrikant Kadam Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, peter@korsgaard.com, palmer@sifive.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-i2c@vger.kernel.org, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org List-Id: linux-i2c@vger.kernel.org On Sat, Jun 01, 2019 at 12:00:23AM +0530, Sagar Shrikant Kadam wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I2C controller's interrupt bit > cannot be cleared if set, due to this the existing i2c polling mode > interface added in mainline earlier doesn't work, and CPU stall's > infinitely, when-ever i2c transfer is initiated. > > Ref: > commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling") > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > FU540-COOO SoC. > > The polling function identifies a SiFive device based on the device node > and enables the workaround. > > Signed-off-by: Sagar Shrikant Kadam > Acked-by: Andrew Lunn Please read: https://lkml.org/lkml/2019/5/22/954 Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86EE6C04AB6 for ; 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Message-ID: <20190531185219.GD23821@lunn.ch> References: <1559327423-13001-1-git-send-email-sagar.kadam@sifive.com> <1559327423-13001-4-git-send-email-sagar.kadam@sifive.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1559327423-13001-4-git-send-email-sagar.kadam@sifive.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190531_115236_969006_5F2B92CB X-CRM114-Status: UNSURE ( 9.26 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, peter@korsgaard.com, palmer@sifive.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-i2c@vger.kernel.org, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Sat, Jun 01, 2019 at 12:00:23AM +0530, Sagar Shrikant Kadam wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I2C controller's interrupt bit > cannot be cleared if set, due to this the existing i2c polling mode > interface added in mainline earlier doesn't work, and CPU stall's > infinitely, when-ever i2c transfer is initiated. > > Ref: > commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling") > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > FU540-COOO SoC. > > The polling function identifies a SiFive device based on the device node > and enables the workaround. > > Signed-off-by: Sagar Shrikant Kadam > Acked-by: Andrew Lunn Please read: https://lkml.org/lkml/2019/5/22/954 Andrew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43346C04AB6 for ; Fri, 31 May 2019 18:52:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1226C244D1 for ; Fri, 31 May 2019 18:52:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="i/2HIvcs" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727187AbfEaSwh (ORCPT ); Fri, 31 May 2019 14:52:37 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:46120 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727053AbfEaSwg (ORCPT ); Fri, 31 May 2019 14:52:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=JHV9B7CY5P1AY/d5DQgFTyOMLZPxcZGMAdD3jQYerfs=; b=i/2HIvcsXchx7C8zTCPQ/Fq3j7 5tUu25qWV2Y/a+nH3xwPGi1ADK/loAoXwxU/vXGkapjhN1/Lufi53N1UzC3LvMRd9EgTrPrtuIkO/ HqGtIUrpTQPz0Kdc0Gpc0Lr6uXBxXEyDvrwk6yDksPAkvp1LolxXy47nHPiN+aazrgsA=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1hWmdX-00007Y-O6; Fri, 31 May 2019 20:52:19 +0200 Date: Fri, 31 May 2019 20:52:19 +0200 From: Andrew Lunn To: Sagar Shrikant Kadam Cc: robh+dt@kernel.org, mark.rutland@arm.com, peter@korsgaard.com, palmer@sifive.com, paul.walmsley@sifive.com, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH REPOST v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC. Message-ID: <20190531185219.GD23821@lunn.ch> References: <1559327423-13001-1-git-send-email-sagar.kadam@sifive.com> <1559327423-13001-4-git-send-email-sagar.kadam@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1559327423-13001-4-git-send-email-sagar.kadam@sifive.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jun 01, 2019 at 12:00:23AM +0530, Sagar Shrikant Kadam wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I2C controller's interrupt bit > cannot be cleared if set, due to this the existing i2c polling mode > interface added in mainline earlier doesn't work, and CPU stall's > infinitely, when-ever i2c transfer is initiated. > > Ref: > commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling") > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > FU540-COOO SoC. > > The polling function identifies a SiFive device based on the device node > and enables the workaround. > > Signed-off-by: Sagar Shrikant Kadam > Acked-by: Andrew Lunn Please read: https://lkml.org/lkml/2019/5/22/954 Andrew