From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9367AC04AB6 for ; Fri, 31 May 2019 21:13:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5A82E26F32 for ; Fri, 31 May 2019 21:13:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="DkedZkKJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727690AbfEaVNb (ORCPT ); Fri, 31 May 2019 17:13:31 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:46454 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727005AbfEaVNb (ORCPT ); Fri, 31 May 2019 17:13:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=4HlBAjxsU/hStG4cLnPSuN+BIi7pCkBRb4fNZwxKJRU=; b=DkedZkKJNrM04iB+lHG/w0Z6Yv 4NIRN4v3FmUV09Wvk2DhhFFHqPo5kzGaWw5cZMZxFkIDn+VWOMYViisUbMhE5OF69yfmP+o29jymP MCDF+GoHOJ+cq0WhU8jzS9EY8wAvnUbno/lJjDva4OGW5FmXWw3PA7BgHZBscGIguYVE=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1hWoq9-0001WJ-5d; Fri, 31 May 2019 23:13:29 +0200 Date: Fri, 31 May 2019 23:13:29 +0200 From: Andrew Lunn To: Robert Hancock Cc: netdev@vger.kernel.org, anirudh@xilinx.com, John.Linn@xilinx.com Subject: Re: [PATCH net-next 02/13] net: axienet: clean up MDIO handling Message-ID: <20190531211329.GE3154@lunn.ch> References: <1559326545-28825-1-git-send-email-hancock@sedsystems.ca> <1559326545-28825-3-git-send-email-hancock@sedsystems.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1559326545-28825-3-git-send-email-hancock@sedsystems.ca> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, May 31, 2019 at 12:15:34PM -0600, Robert Hancock wrote: > -Allow specifying the MDIO clock divisor explicitly in the device tree, > rather than always detecting it from the CPU clock which only works on > the MicroBlaze platform. > > -Centralize all MDIO handling in xilinx_axienet_mdio.c > > -Ensure that MDIO clock divisor is always re-set after resetting the > device, since it will be cleared. > > -Fixed ordering of MDIO teardown vs. netdev teardown That sounds like 4 patches, not one. There are too many thinks mixed up in this patchset. I'm not reviewing it. Sorry. Andrew