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From: Andrew Lunn <andrew@lunn.ch>
To: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Vivien Didelot <vivien.didelot@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Rasmus Villemoes <Rasmus.Villemoes@prevas.se>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next v3 07/10] net: dsa: mv88e6xxx: implement port_link_state for mv88e6250
Date: Mon, 3 Jun 2019 17:06:21 +0200	[thread overview]
Message-ID: <20190603150621.GF19627@lunn.ch> (raw)
In-Reply-To: <20190603144112.27713-8-rasmus.villemoes@prevas.dk>

On Mon, Jun 03, 2019 at 02:42:20PM +0000, Rasmus Villemoes wrote:
> The mv88e6250 has a rather different way of reporting the link, speed
> and duplex status. A simple difference is that the link bit is bit 12
> rather than bit 11 of the port status register.
> 
> It gets more complicated for speed and duplex, which do not have
> separate fields. Instead, there's a four-bit PortMode field, and
> decoding that depends on whether it's a phy or mii port. For the phy
> ports, only four of the 16 values have defined meaning; the rest are
> called "reserved", so returning {SPEED,DUPLEX}_UNKNOWN seems
> reasonable.
> 
> For the mii ports, most possible values are documented (0x3 and 0x5
> are reserved), but I'm unable to make sense of them all. Since the
> bits simply reflect the Px_MODE[3:0] configuration pins, just support
> the subset that I'm certain about. Support for other setups can be
> added later.

The code looks sensible and covers the most likely scenarios.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

  reply	other threads:[~2019-06-03 15:06 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-03 14:42 [PATCH net-next v3 00/10] net: dsa: mv88e6xxx: support for mv88e6250 Rasmus Villemoes
2019-06-03 14:42 ` [PATCH net-next v3 01/10] net: dsa: mv88e6xxx: add mv88e6250_g1_ieee_pri_map Rasmus Villemoes
2019-06-03 14:57   ` Andrew Lunn
2019-06-03 15:37   ` Vivien Didelot
2019-06-03 19:43     ` Rasmus Villemoes
2019-06-03 14:42 ` [PATCH net-next v3 02/10] net: dsa: mv88e6xxx: introduce support for two chips using direct smi addressing Rasmus Villemoes
2019-06-03 14:42 ` [PATCH net-next v3 03/10] net: dsa: mv88e6xxx: prepare mv88e6xxx_g1_atu_op() for the mv88e6250 Rasmus Villemoes
2019-06-03 14:42 ` [PATCH net-next v3 04/10] net: dsa: mv88e6xxx: implement vtu_getnext and vtu_loadpurge for mv88e6250 Rasmus Villemoes
2019-06-03 14:42 ` [PATCH net-next v3 05/10] net: dsa: mv88e6xxx: implement watchdog_ops " Rasmus Villemoes
2019-06-03 14:42 ` [PATCH net-next v3 06/10] net: dsa: mv88e6xxx: implement port_set_speed " Rasmus Villemoes
2019-06-03 15:01   ` Andrew Lunn
2019-06-03 14:42 ` [PATCH net-next v3 07/10] net: dsa: mv88e6xxx: implement port_link_state " Rasmus Villemoes
2019-06-03 15:06   ` Andrew Lunn [this message]
2019-06-03 14:42 ` [PATCH net-next v3 08/10] net: dsa: mv88e6xxx: add support " Rasmus Villemoes
2019-06-03 15:16   ` Andrew Lunn
2019-06-03 14:42 ` [PATCH net-next v3 09/10] dt-bindings: net: dsa: marvell: add "marvell,mv88e6250" compatible string Rasmus Villemoes
2019-06-03 15:17   ` Andrew Lunn
2019-06-03 14:42 ` [PATCH net-next v3 10/10] net: dsa: mv88e6xxx: refactor mv88e6352_g1_reset Rasmus Villemoes
2019-06-03 15:18   ` Andrew Lunn
2019-06-03 20:04 ` [PATCH net-next v3 00/10] net: dsa: mv88e6xxx: support for mv88e6250 David Miller

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