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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY
Date: Thu, 6 Jun 2019 09:00:56 -0700	[thread overview]
Message-ID: <20190606160056.GF3452@intel.com> (raw)
In-Reply-To: <20190605221522.GW13184@mdroper-desk.amr.corp.intel.com>

On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
> On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> > On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> > > Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
> > > this just extends the upper limit; we will continue to honor the max
> > > data rate specified in the VBT in cases where it is lower than HBR3.
> > > 
> > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > 
> > Yes looks good to me.
> > 
> > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> > 
> > Manasi
> 
> Thanks for the quick review.  CI looks happy too, so pushed to dinq.
> 
> 
> Matt
> 
> > 
> > > ---
> > >  drivers/gpu/drm/i915/intel_dp.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > index 24b56b2a76c8..b099a9dc28fd 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
> > >  	enum port port = dig_port->base.port;
> > >  
> > >  	if (intel_port_is_combophy(dev_priv, port) &&
> > > +	    !IS_ELKHARTLAKE(dev_priv) &&

I wonder if we shouldn't use IS_ICELAKE instead of !IS_ELKHARTLAKE here...
but it seems to late...

But something to remember to pay attention on any upcoming platform...

> > >  	    !intel_dp_is_edp(intel_dp))
> > >  		return 540000;
> > >  
> > > -- 
> > > 2.14.5
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-06-06 16:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-05 21:18 [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY Matt Roper
2019-06-05 21:51 ` Manasi Navare
2019-06-05 22:15   ` Matt Roper
2019-06-06  8:28     ` Jani Nikula
2019-06-06 16:00     ` Rodrigo Vivi [this message]
2019-06-06 16:09       ` Lucas De Marchi
2019-06-06 17:09         ` Matt Roper
2019-06-05 22:04 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-06-07 19:38 ` ✗ Fi.CI.IGT: failure " Patchwork

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