From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Regression in U-boot v2019-07-rcX
Date: Mon, 17 Jun 2019 10:49:29 +0300 [thread overview]
Message-ID: <20190617074929.GW9224@smile.fi.intel.com> (raw)
In-Reply-To: <CAEUhbmX_WCA3Bs4o3sa8Z-QHysEvffWsASJ3KLQ_HwAHava2TQ@mail.gmail.com>
On Wed, Jun 12, 2019 at 10:07:11PM +0800, Bin Meng wrote:
> On Wed, Jun 12, 2019 at 9:49 PM Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> > On Wed, Jun 12, 2019 at 04:23:37PM +0300, Andy Shevchenko wrote:
> > > On Wed, Jun 12, 2019 at 04:18:25PM +0300, Andy Shevchenko wrote:
> > commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a
> > Author: Simon Glass <sjg@chromium.org>
> > Date: Thu Apr 25 21:59:06 2019 -0600
> >
> > x86: Don't set up MTRRs in SPL
> >
> >
> > Please revert ASAP before release, thanks!
>
> So it looks that MTRRs are not programmed for Intel Edison to enable cache?
>
> Simon, would you please take a look? I suspect simply revert this will
> break the Chromebook SPL build?
Since there is no activity on this and release is coming, I would propose to
revert for now.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2019-06-17 7:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-12 13:18 [U-Boot] Regression in U-boot v2019-07-rcX Andy Shevchenko
2019-06-12 13:23 ` Andy Shevchenko
2019-06-12 13:37 ` Lukasz Majewski
2019-06-12 14:00 ` Andy Shevchenko
2019-06-12 13:49 ` Andy Shevchenko
2019-06-12 14:07 ` Bin Meng
2019-06-17 7:49 ` Andy Shevchenko [this message]
2019-06-17 9:51 ` Simon Glass
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