From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=0.3 required=3.0 tests=FROM_EXCESS_BASE64, HEADER_FROM_DIFFERENT_DOMAINS,HK_RANDOM_FROM,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F896C31E5D for ; Mon, 17 Jun 2019 15:50:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 734AB2133F for ; Mon, 17 Jun 2019 15:50:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728526AbfFQPup (ORCPT ); Mon, 17 Jun 2019 11:50:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43146 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727557AbfFQPup (ORCPT ); Mon, 17 Jun 2019 11:50:45 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C2A3930BC56A; Mon, 17 Jun 2019 15:50:44 +0000 (UTC) Received: from flask (unknown [10.43.2.199]) by smtp.corp.redhat.com (Postfix) with SMTP id E49F2783BF; Mon, 17 Jun 2019 15:50:38 +0000 (UTC) Received: by flask (sSMTP sendmail emulation); Mon, 17 Jun 2019 17:50:38 +0200 Date: Mon, 17 Jun 2019 17:50:38 +0200 From: Radim =?utf-8?B?S3LEjW3DocWZ?= To: Xiaoyao Li Cc: Tao Xu , pbonzini@redhat.com, corbet@lwn.net, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, sean.j.christopherson@intel.com, fenghua.yu@intel.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, jingqi.liu@intel.com Subject: Re: [PATCH RESEND v3 2/3] KVM: vmx: Emulate MSR IA32_UMWAIT_CONTROL Message-ID: <20190617155038.GA13955@flask> References: <20190616095555.20978-1-tao3.xu@intel.com> <20190616095555.20978-3-tao3.xu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Mon, 17 Jun 2019 15:50:44 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org 2019-06-17 14:31+0800, Xiaoyao Li: > On 6/17/2019 11:32 AM, Xiaoyao Li wrote: > > On 6/16/2019 5:55 PM, Tao Xu wrote: > > > +    if (vmx->msr_ia32_umwait_control != host_umwait_control) > > > +        add_atomic_switch_msr(vmx, MSR_IA32_UMWAIT_CONTROL, > > > +                      vmx->msr_ia32_umwait_control, > > > +                      host_umwait_control, false); > > > > The bit 1 is reserved, at least, we need to do below to ensure not > > modifying the reserved bit: > > > >     guest_val = (vmx->msr_ia32_umwait_control & ~BIT_ULL(1)) | > >             (host_val & BIT_ULL(1)) > > > > I find a better solution to ensure reserved bit 1 not being modified in > vmx_set_msr() as below: > > if((data ^ umwait_control_cached) & BIT_ULL(1)) > return 1; We could just be checking if (data & BIT_ULL(1)) because the guest cannot change its visible reserved value and KVM currently initializes the value to 0. The arch/x86/kernel/cpu/umwait.c series assumes that the reserved bit is 0 (hopefully deliberately) and I would do the same in KVM as it simplifies the logic. (We don't have to even think about migrations between machines with a different reserved value and making it play nicely with possible future implementations of that bit.) Thanks.