From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A1DAC43613 for ; Wed, 19 Jun 2019 23:23:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5DBBE2085A for ; Wed, 19 Jun 2019 23:23:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5DBBE2085A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:42530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdjuw-0008Oy-0d for qemu-devel@archiver.kernel.org; Wed, 19 Jun 2019 19:23:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49660) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdjtf-0007hG-A7 for qemu-devel@nongnu.org; Wed, 19 Jun 2019 19:21:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdjte-0006vV-Ba for qemu-devel@nongnu.org; Wed, 19 Jun 2019 19:21:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:5406) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdjte-0006u7-5c for qemu-devel@nongnu.org; Wed, 19 Jun 2019 19:21:42 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 72E3589AD0; Wed, 19 Jun 2019 23:21:40 +0000 (UTC) Received: from localhost (ovpn-116-76.gru2.redhat.com [10.97.116.76]) by smtp.corp.redhat.com (Postfix) with ESMTP id D145C19C5B; Wed, 19 Jun 2019 23:21:39 +0000 (UTC) Date: Wed, 19 Jun 2019 20:21:37 -0300 From: Eduardo Habkost To: Like Xu Message-ID: <20190619232137.GA1542@habkost.net> References: <20190612084104.34984-1-like.xu@linux.intel.com> <20190612084104.34984-7-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190612084104.34984-7-like.xu@linux.intel.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 19 Jun 2019 23:21:40 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-devel] [PATCH v3 6/9] i386/cpu: Add CPUID.1F generation support for multi-dies PCMachine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-devel@nongnu.org, "Dr . David Alan Gilbert" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" I've just noticed one thing I don't understand: On Wed, Jun 12, 2019 at 04:41:01PM +0800, Like Xu wrote: > The CPUID.1F as Intel V2 Extended Topology Enumeration Leaf would be > exposed if guests want to emulate multiple software-visible die within > each package. Per Intel's SDM, the 0x1f is a superset of 0xb, thus they > can be generated by almost same code as 0xb except die_offset setting. > > If the number of dies per package is less than 2, the qemu will not > expose CPUID.1F regardless of whether the host supports CPUID.1F. > > Signed-off-by: Like Xu > --- > target/i386/cpu.c | 37 +++++++++++++++++++++++++++++++++++++ > target/i386/cpu.h | 4 ++++ > target/i386/kvm.c | 12 ++++++++++++ > 3 files changed, 53 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 09e20a2c3b..127aff74a6 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -4437,6 +4437,42 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > *ecx |= CPUID_TOPOLOGY_LEVEL_INVALID; > } > > + assert(!(*eax & ~0x1f)); > + *ebx &= 0xffff; /* The count doesn't need to be reliable. */ > + break; > + case 0x1F: > + /* V2 Extended Topology Enumeration Leaf */ > + if (env->nr_dies < 2 || !cpu->enable_cpuid_0x1f) { > + *eax = *ebx = *ecx = *edx = 0; Why exactly do you need cpu->enable_cpuid_0x1f? When would it make sense to set dies > 1 but disable CPUID.1F? > + break; > + } [...] -- Eduardo