From: Peter Zijlstra <peterz@infradead.org>
To: "Phillips, Kim" <kim.phillips@amd.com>
Cc: Ingo Molnar <mingo@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"stable@vger.kernel.org" <stable@vger.kernel.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>, "H. Peter Anvin" <hpa@zytor.com>,
Martin Liska <mliska@suse.cz>,
"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>,
"Natarajan, Janakarajan" <Janakarajan.Natarajan@amd.com>,
"Hook, Gary" <Gary.Hook@amd.com>, Pu Wen <puwen@hygon.cn>,
Stephane Eranian <eranian@google.com>,
Vince Weaver <vincent.weaver@maine.edu>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [PATCH 1/2 RESEND3] perf/x86/amd/uncore: Do not set ThreadMask and SliceMask for non-L3 PMCs
Date: Mon, 1 Jul 2019 10:21:48 +0200 [thread overview]
Message-ID: <20190701082148.GN3402@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190628215906.4276-1-kim.phillips@amd.com>
On Fri, Jun 28, 2019 at 09:59:20PM +0000, Phillips, Kim wrote:
> From: Kim Phillips <kim.phillips@amd.com>
>
> Commit d7cbbe49a930 ("perf/x86/amd/uncore: Set ThreadMask and SliceMask
> for L3 Cache perf events") enables L3 PMC events for all threads and
> slices by writing 1s in ChL3PmcCfg (L3 PMC PERF_CTL) register fields.
>
> Those bitfields overlap with high order event select bits in the Data
> Fabric PMC control register, however.
>
> So when a user requests raw Data Fabric events (-e amd_df/event=0xYYY/),
> the two highest order bits get inadvertently set, changing the counter
> select to events that don't exist, and for which no counts are read.
>
> This patch changes the logic to write the L3 masks only when dealing
> with L3 PMC counters.
>
> AMD Family 16h and below Northbridge (NB) counters were not affected.
Thanks!
next prev parent reply other threads:[~2019-07-01 8:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 21:59 [PATCH 1/2 RESEND3] perf/x86/amd/uncore: Do not set ThreadMask and SliceMask for non-L3 PMCs Phillips, Kim
2019-06-28 21:59 ` [PATCH 2/2 RESEND3] perf/x86/amd/uncore: set the thread mask for F17h L3 PMCs Phillips, Kim
2019-07-13 11:11 ` [tip:perf/urgent] perf/x86/amd/uncore: Set " tip-bot for Kim Phillips
2019-07-01 8:21 ` Peter Zijlstra [this message]
2019-07-13 11:10 ` [tip:perf/urgent] perf/x86/amd/uncore: Do not set 'ThreadMask' and 'SliceMask' for non-L3 PMCs tip-bot for Kim Phillips
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