From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peng Fan Date: Mon, 8 Jul 2019 01:39:55 +0000 Subject: [U-Boot] [PATCH V2 30/51] ddr: imx8m: Fix ddr4 driver build issue In-Reply-To: <20190708015333.20411-1-peng.fan@nxp.com> References: <20190708015333.20411-1-peng.fan@nxp.com> Message-ID: <20190708015333.20411-31-peng.fan@nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Ye Li Since the parameter of dram_pll_init is changed, update to use new. Also remove non-existed header file. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- drivers/ddr/imx/imx8m/ddr4_init.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/ddr/imx/imx8m/ddr4_init.c b/drivers/ddr/imx/imx8m/ddr4_init.c index 031cdc57e1..b8aa104536 100644 --- a/drivers/ddr/imx/imx8m/ddr4_init.c +++ b/drivers/ddr/imx/imx8m/ddr4_init.c @@ -8,7 +8,6 @@ #include #include #include -#include #include void ddr4_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) @@ -41,7 +40,7 @@ void ddr_init(struct dram_timing_info *dram_timing) CLK_ROOT_SOURCE_SEL(4) | CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); - dram_pll_init(DRAM_PLL_OUT_600M); + dram_pll_init(MHZ(600)); reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */ reg32setbit(0x303A00F8, 5); /* PU_PGC_SW_PUP_REQ */ -- 2.16.4