From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: [PATCH] drm/amd/display: avoid 64-bit division Date: Mon, 8 Jul 2019 15:52:08 +0200 Message-ID: <20190708135238.651483-1-arnd@arndb.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Harry Wentland , Leo Li , Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , "David (ChunMing) Zhou" , David Airlie , Daniel Vetter Cc: Charlene Liu , Chris Park , Arnd Bergmann , Tony Cheng , David Francis , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, Nikola Cornij , Dmytro Laktyushkin , dri-devel@lists.freedesktop.org, Jun Lei , Bhawanpreet Lakha , Anthony Koo List-Id: amd-gfx.lists.freedesktop.org T24gMzItYml0IGFyY2hpdGVjdHVyZXMsIGRpdmlkaW5nIGEgNjQtYml0IGludGVnZXIgaW4gdGhl IGtlcm5lbApsZWFkcyB0byBhIGxpbmsgZXJyb3I6CgpFUlJPUjogIl9fdWRpdmRpMyIgW2RyaXZl cnMvZ3B1L2RybS9hbWQvYW1kZ3B1L2FtZGdwdS5rb10gdW5kZWZpbmVkIQpFUlJPUjogIl9fZGl2 ZGkzIiBbZHJpdmVycy9ncHUvZHJtL2FtZC9hbWRncHUvYW1kZ3B1LmtvXSB1bmRlZmluZWQhCgpD aGFuZ2UgdGhlIHR3byByZWNlbnRseSBpbnRyb2R1Y2VkIGluc3RhbmNlcyB0byBhIG11bHRpcGx5 K3NoaWZ0Cm9wZXJhdGlvbiB0aGF0IGlzIGFsc28gbXVjaCBjaGVhcGVyIG9uIDMyLWJpdCBhcmNo aXRlY3R1cmVzLgpXZSBjYW4gZG8gdGhhdCBoZXJlLCBzaW5jZSBib3RoIG9mIHRoZW0gYXJlIHJl YWxseSAzMi1iaXQgbnVtYmVycwp0aGF0IGNoYW5nZSBhIGZldyBwZXJjZW50LgoKRml4ZXM6IGJl ZGJiZTZhZjRiZSAoImRybS9hbWQvZGlzcGxheTogTW92ZSBsaW5rIGZ1bmN0aW9ucyBmcm9tIGRj IHRvIGRjX2xpbmsiKQpGaXhlczogZjE4YmM0ZTUzYWQ2ICgiZHJtL2FtZC9kaXNwbGF5OiB1cGRh dGUgY2FsY3VsYXRlZCBib3VuZGluZyBib3ggbG9naWMgZm9yIE5WIikKU2lnbmVkLW9mZi1ieTog QXJuZCBCZXJnbWFubiA8YXJuZEBhcm5kYi5kZT4KLS0tCiBkcml2ZXJzL2dwdS9kcm0vYW1kL2Rp c3BsYXkvZGMvY29yZS9kY19saW5rLmMgICAgICAgICB8IDQgKystLQogZHJpdmVycy9ncHUvZHJt L2FtZC9kaXNwbGF5L2RjL2RjbjIwL2RjbjIwX3Jlc291cmNlLmMgfCAyICstCiAyIGZpbGVzIGNo YW5nZWQsIDMgaW5zZXJ0aW9ucygrKSwgMyBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS9kcml2 ZXJzL2dwdS9kcm0vYW1kL2Rpc3BsYXkvZGMvY29yZS9kY19saW5rLmMgYi9kcml2ZXJzL2dwdS9k cm0vYW1kL2Rpc3BsYXkvZGMvY29yZS9kY19saW5rLmMKaW5kZXggYzE3ZGI1YzE0NGFhLi44ZGJm NzU5ZWJhNDUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9hbWQvZGlzcGxheS9kYy9jb3Jl L2RjX2xpbmsuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vYW1kL2Rpc3BsYXkvZGMvY29yZS9kY19s aW5rLmMKQEAgLTMwNzIsOCArMzA3Miw4IEBAIHVpbnQzMl90IGRjX2xpbmtfYmFuZHdpZHRoX2ti cHMoCiAJCSAqIGJ1dCB0aGUgZGlmZmVyZW5jZSBpcyBtaW5pbWFsIGFuZCBpcyBpbiBhIHNhZmUg ZGlyZWN0aW9uLAogCQkgKiB3aGljaCBhbGwgd29ya3Mgd2VsbCBhcm91bmQgcG90ZW50aWFsIGFt YmlndWl0eSBvZiBEUCAxLjRhIHNwZWMuCiAJCSAqLwotCQlsb25nIGxvbmcgZmVjX2xpbmtfYndf a2JwcyA9IGxpbmtfYndfa2JwcyAqIDk3MExMOwotCQlsaW5rX2J3X2ticHMgPSAodWludDMyX3Qp KGZlY19saW5rX2J3X2ticHMgLyAxMDAwTEwpOworCQlsaW5rX2J3X2ticHMgPSBtdWxfdTY0X3Uz Ml9zaHIoQklUX1VMTCgzMikgKiA5NzBMTCAvIDEwMDAsCisJCQkJCSAgICAgICBsaW5rX2J3X2ti cHMsIDMyKTsKIAl9CiAjZW5kaWYKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2FtZC9k aXNwbGF5L2RjL2RjbjIwL2RjbjIwX3Jlc291cmNlLmMgYi9kcml2ZXJzL2dwdS9kcm0vYW1kL2Rp c3BsYXkvZGMvZGNuMjAvZGNuMjBfcmVzb3VyY2UuYwppbmRleCBiMzUzMjdiYWZiYzUuLjcwYWM4 YTk1ZDJkYiAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2FtZC9kaXNwbGF5L2RjL2RjbjIw L2RjbjIwX3Jlc291cmNlLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2FtZC9kaXNwbGF5L2RjL2Rj bjIwL2RjbjIwX3Jlc291cmNlLmMKQEAgLTI2NTcsNyArMjY1Nyw3IEBAIHN0YXRpYyB2b2lkIHVw ZGF0ZV9ib3VuZGluZ19ib3goc3RydWN0IGRjICpkYywgc3RydWN0IF92Y3NfZHBpX3NvY19ib3Vu ZGluZ19ib3hfCiAJCWNhbGN1bGF0ZWRfc3RhdGVzW2ldLmRyYW1fc3BlZWRfbXRzID0gdWNsa19z dGF0ZXNbaV0gKiAxNiAvIDEwMDA7CiAKIAkJLy8gRkNMSzpVQ0xLIHJhdGlvIGlzIDEuMDgKLQkJ bWluX2ZjbGtfcmVxdWlyZWRfYnlfdWNsayA9ICgodW5zaWduZWQgbG9uZyBsb25nKXVjbGtfc3Rh dGVzW2ldKSAqIDEwODAgLyAxMDAwMDAwOworCQltaW5fZmNsa19yZXF1aXJlZF9ieV91Y2xrID0g bXVsX3U2NF91MzJfc2hyKEJJVF9VTEwoMzIpICogMTA4MCAvIDEwMDAwMDAsIHVjbGtfc3RhdGVz W2ldLCAzMik7CiAKIAkJY2FsY3VsYXRlZF9zdGF0ZXNbaV0uZmFicmljY2xrX21oeiA9IChtaW5f ZmNsa19yZXF1aXJlZF9ieV91Y2xrIDwgbWluX2RjZmNsaykgPwogCQkJCW1pbl9kY2ZjbGsgOiBt aW5fZmNsa19yZXF1aXJlZF9ieV91Y2xrOwotLSAKMi4yMC4wCgpfX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1k ZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcv bWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWw= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDC38C606BA for ; Mon, 8 Jul 2019 13:52:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B88B420861 for ; Mon, 8 Jul 2019 13:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731517AbfGHNwu (ORCPT ); Mon, 8 Jul 2019 09:52:50 -0400 Received: from mout.kundenserver.de ([217.72.192.75]:41773 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727401AbfGHNwu (ORCPT ); Mon, 8 Jul 2019 09:52:50 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue109 [212.227.15.145]) with ESMTPA (Nemesis) id 1MTAJl-1hvicR406R-00UWYx; Mon, 08 Jul 2019 15:52:41 +0200 From: Arnd Bergmann To: Harry Wentland , Leo Li , Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , "David (ChunMing) Zhou" , David Airlie , Daniel Vetter Cc: Arnd Bergmann , Chris Park , Charlene Liu , Jun Lei , Tony Cheng , Bhawanpreet Lakha , Tony Cheng , Anthony Koo , David Francis , Dmytro Laktyushkin , Nikola Cornij , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/amd/display: avoid 64-bit division Date: Mon, 8 Jul 2019 15:52:08 +0200 Message-Id: <20190708135238.651483-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Provags-ID: V03:K1:52AGef0Lq+dkr8kwjZNMwANHvgY3NRXyfVsWmIJgsnAVhNNRfc6 +DvJqiMs58ht8342jZhhnhohh35rAb8AknH5DtGDOAN2AdFoXCfAFhd66huKJ7KP7xjFEOl 1kTxt89yac00Xl8XVX6DHMdODQQoJ3QXl2KnJ+nrhTWnmYS5yWJD5d1DKT84ZJmlLvczuip 7ZBsA0mrNEjAw8ono+ZwA== X-UI-Out-Filterresults: notjunk:1;V03:K0:LM2YkTiy6w0=:Urgvr2KhXrQJHmnNUZ3Aay HFfPj1p4DzZqha1rGAJgrxsvl9i8srVeglCgb73+oum6M1wTdy8DYfYrTpaFTlP7cev+MOAos kyeL6Eq13c7PwtKIpYMvsJYlLZYlh8gu2FUWblDQa3Ng1tNbBh0jSZZQGnBdzegEvULxEcq7u c0la0Zph5YDkQMp/0h0NCc+2rN7rBiMFvYCcw5WwcIb3KegNA3Upn0RYUxCJ/zwbcWup7PHxE xIOB3orusnst6VaI+JFBAsA3Ks7kljv0AXSpRWYyJ6JUKE9jMXIyr/o5QCDN7MDLN3KQkwSQa 6EF2OKILbWXOGfxMgiYdbQefheqOutolj0llTvM7r6pqMHHmOI7DTKvdSRcuoE8CR04K7knZP XdfDWv8uuYM0ZAmAR4kg5jOez0yZ00rwbL7QEeMyVQBnQAZpfOMlzgXKNSWusQO4/QpKcvEmn 5dRCBC4s+r3HluLBSBrvRCR4Hbp9JAX68dim4X+6XlwZTPv95qtUe7yRhl5wLi32pyKwQroQX QoJDTBHHe/XBKcv7z7pajYSK2k9b6VwYvRV9efBlEPZDVmik3ZInGRj5IA1M1JRxVyANblVZU whrhtyHeR68dVy7SfImFQF4WsLWiahcsOCCbt3jlXsAkb+qbKb72HBUalG8TZNiVbHJjKGvC0 kyZ2JWup0wlDDaCg6Gtg0BkHw3LAxzl05Bx0JK3pj2GEz4sSPk4X3jqV1gl9EhI8RUie7/7ak LSU+6aP8VHZ+Up6UUb4n9RG4490JV7q7/gvsVw== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 32-bit architectures, dividing a 64-bit integer in the kernel leads to a link error: ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! Change the two recently introduced instances to a multiply+shift operation that is also much cheaper on 32-bit architectures. We can do that here, since both of them are really 32-bit numbers that change a few percent. Fixes: bedbbe6af4be ("drm/amd/display: Move link functions from dc to dc_link") Fixes: f18bc4e53ad6 ("drm/amd/display: update calculated bounding box logic for NV") Signed-off-by: Arnd Bergmann --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++-- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index c17db5c144aa..8dbf759eba45 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3072,8 +3072,8 @@ uint32_t dc_link_bandwidth_kbps( * but the difference is minimal and is in a safe direction, * which all works well around potential ambiguity of DP 1.4a spec. */ - long long fec_link_bw_kbps = link_bw_kbps * 970LL; - link_bw_kbps = (uint32_t)(fec_link_bw_kbps / 1000LL); + link_bw_kbps = mul_u64_u32_shr(BIT_ULL(32) * 970LL / 1000, + link_bw_kbps, 32); } #endif diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index b35327bafbc5..70ac8a95d2db 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2657,7 +2657,7 @@ static void update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_ calculated_states[i].dram_speed_mts = uclk_states[i] * 16 / 1000; // FCLK:UCLK ratio is 1.08 - min_fclk_required_by_uclk = ((unsigned long long)uclk_states[i]) * 1080 / 1000000; + min_fclk_required_by_uclk = mul_u64_u32_shr(BIT_ULL(32) * 1080 / 1000000, uclk_states[i], 32); calculated_states[i].fabricclk_mhz = (min_fclk_required_by_uclk < min_dcfclk) ? min_dcfclk : min_fclk_required_by_uclk; -- 2.20.0