From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sam Ravnborg Subject: Re: [PATCH v5 2/7] drm/panel: simple: Add ability to override typical timing Date: Mon, 8 Jul 2019 19:50:08 +0200 Message-ID: <20190708175007.GA3511@ravnborg.org> References: <20190401171724.215780-1-dianders@chromium.org> <20190401171724.215780-3-dianders@chromium.org> <20190630202246.GB15102@ravnborg.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Doug Anderson Cc: devicetree@vger.kernel.org, David Airlie , Jeffy Chen , LKML , Rob Herring , "open list:ARM/Rockchip SoC..." , Thierry Reding , Sean Paul , dri-devel , Boris Brezillon , Enric =?iso-8859-1?Q?Balletb=F2?= , =?iso-8859-1?Q?St=E9phane?= Marchesin , Ezequiel Garcia , Matthias Kaehlcke , Laurent Pinchart List-Id: linux-rockchip.vger.kernel.org SGkgRG91Z2guCgpPbiBNb24sIEp1bCAwMSwgMjAxOSBhdCAwOTozOToyNEFNIC0wNzAwLCBEb3Vn IEFuZGVyc29uIHdyb3RlOgo+IEhpLAo+IAo+IE9uIFN1biwgSnVuIDMwLCAyMDE5IGF0IDE6MjIg UE0gU2FtIFJhdm5ib3JnIDxzYW1AcmF2bmJvcmcub3JnPiB3cm90ZToKPiA+Cj4gPiA+IEBAIC05 MSw2ICs5Miw4IEBAIHN0cnVjdCBwYW5lbF9zaW1wbGUgewo+ID4gPiAgICAgICBzdHJ1Y3QgaTJj X2FkYXB0ZXIgKmRkYzsKPiA+ID4KPiA+ID4gICAgICAgc3RydWN0IGdwaW9fZGVzYyAqZW5hYmxl X2dwaW87Cj4gPiA+ICsKPiA+ID4gKyAgICAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgb3ZlcnJp ZGVfbW9kZTsKPiA+IEkgZmFpbCB0byBzZWUgd2hlcmUgdGhpcyBwb2l0ZXIgaXMgYXNzaWduZWQu Cj4gCj4gSW4gcGFuZWxfc2ltcGxlX3BhcnNlX292ZXJyaWRlX21vZGUoKS4gIFNwZWNpZmljYWxs eToKPiAKPiBkcm1fZGlzcGxheV9tb2RlX2Zyb21fdmlkZW9tb2RlKCZ2bSwgJnBhbmVsLT5vdmVy cmlkZV9tb2RlKTsKClRoZSBhYm92ZSBjb2RlLXNuaXBwZXQgaXMgb25seSBjYWxsZWQgaW4gdGhl IHBhbmVsIGhhcyBzcGVjaWZpZWQgZGlzcGxheQp0aW1pbmdzIHVzaW5nIGRpc3BsYXlfdGltaW5n cyAtIGl0IGlzIG5vdCBjYWxsZWQgd2hlbiBkaXNwbGF5X21vZGUgaXMKdXNlZC4KU28gb3ZlcnJp ZGVfbW9kZSBpcyBvbmx5IGFzc2lnbmVkIGluIHNvbWUgY2FzZXMgYW5kIG5vdCBhbGwgY2FzZXMu ClRoaXMgbmVlZHMgdG8gYmUgZml4ZWQgc28gd2UgZG8gbm90IHJlZmVyZW5jZSBvdmVycmlkZV9t b2RlIHVubGVzcwppdCBpcyBzZXQuCgo+IAo+IAo+ID4gQEAgLTE1Miw2ICsxNjIsNDQgQEAgc3Rh dGljIGludCBwYW5lbF9zaW1wbGVfZ2V0X2ZpeGVkX21vZGVzKHN0cnVjdCBwYW5lbF9zaW1wbGUg KnBhbmVsKQo+ID4gPiAgICAgICAgICAgICAgIG51bSsrOwo+ID4gPiAgICAgICB9Cj4gPiA+Cj4g PiA+ICsgICAgIHJldHVybiBudW07Cj4gPiA+ICt9Cj4gPiA+ICsKPiA+ID4gK3N0YXRpYyBpbnQg cGFuZWxfc2ltcGxlX2dldF9ub25fZWRpZF9tb2RlcyhzdHJ1Y3QgcGFuZWxfc2ltcGxlICpwYW5l bCkKPiA+ID4gK3sKPiA+ID4gKyAgICAgc3RydWN0IGRybV9jb25uZWN0b3IgKmNvbm5lY3RvciA9 IHBhbmVsLT5iYXNlLmNvbm5lY3RvcjsKPiA+ID4gKyAgICAgc3RydWN0IGRybV9kZXZpY2UgKmRy bSA9IHBhbmVsLT5iYXNlLmRybTsKPiA+ID4gKyAgICAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUg Km1vZGU7Cj4gPiA+ICsgICAgIGJvb2wgaGFzX292ZXJyaWRlID0gcGFuZWwtPm92ZXJyaWRlX21v ZGUudHlwZTsKPiA+IFRoaXMgbG9va3Mgc3VzcGljaW91cy4KPiA+IHBhbmVsLT5vdmVycmlkZV9t b2RlLnR5cGUgaXMgYW4gdW5zaWduZWQgaW50IHRoYXQgbWF5IGhhdmUgYSBudW1iZXIgb2YKPiA+ IGJpdHMgc2V0Lgo+ID4gU28gdGhlIGFib3ZlIGNvZGUgaW1wbGljaXRseSBjb252ZXJ0IGEgLnR5 cGUgIT0gMCB0byBhIHRydWUuCj4gPiBUaGlzIGNhbiBiZSBleHByZXNzZWQgaW4gYSBtdWNoIG1v cmUgcmVhZGVyIGZyaWVuZGx5IHdheS4KPiAKPiBZb3Ugd291bGQgc3VnZ2VzdCB0aGF0IEkgYWRk IGEgYm9vbGVhbiBmaWVsZCB0byBhIHN0cnVjdHVyZSB0bwo+IGluZGljYXRlIHdoZXRoZXIgYW4g b3ZlcnJpZGUgbW9kZSBpcyBwcmVzZW50PwpBIHNpbXBsZSAgYm9vbCBoYXNfb3ZlcnJpZGUgPSBw YW5lbC0+b3ZlcnJpZGVfbW9kZS50eXBlICE9IDA7CndvdWxkIGRvIHRoZSB0cmljayBoZXJlLgpU aGVuIHRoZXJlIGlzIG5vIGhpZGRlbiBjb252ZXJzaW9uIGZyb20gaW50IHRvIGEgYm9vbC4KCkJ1 dCBhcyBvdmVycmlkZV9tb2RlIGNhbiBiZSBOVUxMIHNvbWV0aGluZyBtb3JlIG5lZWRzIHRvIGJl IGRvbmUuCgoJU2FtCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9y ZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZl bA== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D40C5C606BD for ; Mon, 8 Jul 2019 17:50:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B8818218A0 for ; Mon, 8 Jul 2019 17:50:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404059AbfGHRuQ (ORCPT ); Mon, 8 Jul 2019 13:50:16 -0400 Received: from asavdk4.altibox.net ([109.247.116.15]:41184 "EHLO asavdk4.altibox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730936AbfGHRuP (ORCPT ); Mon, 8 Jul 2019 13:50:15 -0400 Received: from ravnborg.org (unknown [158.248.194.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by asavdk4.altibox.net (Postfix) with ESMTPS id 6F4BD80636; Mon, 8 Jul 2019 19:50:09 +0200 (CEST) Date: Mon, 8 Jul 2019 19:50:08 +0200 From: Sam Ravnborg To: Doug Anderson Cc: Thierry Reding , Heiko Stuebner , Sean Paul , devicetree@vger.kernel.org, Rob Herring , David Airlie , Jeffy Chen , dri-devel , LKML , "open list:ARM/Rockchip SoC..." , Boris Brezillon , Laurent Pinchart , Enric =?iso-8859-1?Q?Balletb=F2?= , =?iso-8859-1?Q?St=E9phane?= Marchesin , Ezequiel Garcia , Matthias Kaehlcke Subject: Re: [PATCH v5 2/7] drm/panel: simple: Add ability to override typical timing Message-ID: <20190708175007.GA3511@ravnborg.org> References: <20190401171724.215780-1-dianders@chromium.org> <20190401171724.215780-3-dianders@chromium.org> <20190630202246.GB15102@ravnborg.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CMAE-Score: 0 X-CMAE-Analysis: v=2.3 cv=VcLZwmh9 c=1 sm=1 tr=0 a=UWs3HLbX/2nnQ3s7vZ42gw==:117 a=UWs3HLbX/2nnQ3s7vZ42gw==:17 a=jpOVt7BSZ2e4Z31A5e1TngXxSK0=:19 a=kj9zAlcOel0A:10 a=7gkXJVJtAAAA:8 a=AWgJsaMlI6ysr0MxQJMA:9 a=0846P8UFn4bgp1PN:21 a=puqGkp3IltQWEqwz:21 a=CjuIK1q_8ugA:10 a=E9Po1WZjFZOl8hwRPBS3:22 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Dough. On Mon, Jul 01, 2019 at 09:39:24AM -0700, Doug Anderson wrote: > Hi, > > On Sun, Jun 30, 2019 at 1:22 PM Sam Ravnborg wrote: > > > > > @@ -91,6 +92,8 @@ struct panel_simple { > > > struct i2c_adapter *ddc; > > > > > > struct gpio_desc *enable_gpio; > > > + > > > + struct drm_display_mode override_mode; > > I fail to see where this poiter is assigned. > > In panel_simple_parse_override_mode(). Specifically: > > drm_display_mode_from_videomode(&vm, &panel->override_mode); The above code-snippet is only called in the panel has specified display timings using display_timings - it is not called when display_mode is used. So override_mode is only assigned in some cases and not all cases. This needs to be fixed so we do not reference override_mode unless it is set. > > > > @@ -152,6 +162,44 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) > > > num++; > > > } > > > > > > + return num; > > > +} > > > + > > > +static int panel_simple_get_non_edid_modes(struct panel_simple *panel) > > > +{ > > > + struct drm_connector *connector = panel->base.connector; > > > + struct drm_device *drm = panel->base.drm; > > > + struct drm_display_mode *mode; > > > + bool has_override = panel->override_mode.type; > > This looks suspicious. > > panel->override_mode.type is an unsigned int that may have a number of > > bits set. > > So the above code implicitly convert a .type != 0 to a true. > > This can be expressed in a much more reader friendly way. > > You would suggest that I add a boolean field to a structure to > indicate whether an override mode is present? A simple bool has_override = panel->override_mode.type != 0; would do the trick here. Then there is no hidden conversion from int to a bool. But as override_mode can be NULL something more needs to be done. Sam