Re: [PATCH 1/4 v1] gpio: Add support for hierarchical IRQ domains

[Brian Masney <masneyb@onstation.org>]

Hi Linus,

On Mon, Jun 24, 2019 at 03:25:28PM +0200, Linus Walleij wrote:
> +associated irqdomain and resource allocation callbacks. These are activated
> +by selecting the Kconfig symbol GPIOLIB_IRQCHIP. If the symbol
> +IRQ_DOMAIN_HIERARCHY is also selected, hierarchical helpers will also be
> +provided. A big portion of overhead code will be managed by gpiolib,
> +under the assumption that your interrupts are 1-to-1-mapped to the
> +GPIO line index:
> +
> +  GPIO line offset   Hardware IRQ
> +  0                  0
> +  1                  1
> +  2                  2
> +  ...                ...
> +  ngpio-1            ngpio-1
> +
> +If some GPIO lines do not have corresponding IRQs, the bitmask valid_mask
> +and the flag need_valid_mask in gpio_irq_chip can be used to mask off some
> +lines as invalid for associating with IRQs.

I forgot to call out in my patch series that the GPIOs are numbered
1..ngpio on Qualcomm and the existing to_irq and translate callbacks
in mainline take care of adding and subtracting one to / from the
offset.

I was under the (false?) assumption that GPIO numbering on all platforms
start at one. Is that not the case?

Brian