From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 03/25] drm/i915/tgl: Introduce Tiger Lake PCH
Date: Tue, 9 Jul 2019 05:04:07 -0700 [thread overview]
Message-ID: <20190709120407.GE16315@intel.com> (raw)
In-Reply-To: <20190708231629.9296-4-lucas.demarchi@intel.com>
On Mon, Jul 08, 2019 at 04:16:07PM -0700, Lucas De Marchi wrote:
> From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
>
> Add the enum additions to TGP.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: David Weinehall <david.weinehall@intel.com>
> Cc: James Ausmus <james.ausmus@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++++
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 794c6814a6d0..bcedd2d8e267 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -224,6 +224,10 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
> DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
> WARN_ON(!IS_ELKHARTLAKE(dev_priv));
> return PCH_MCC;
> + case INTEL_PCH_TGP_DEVICE_ID_TYPE:
> + DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
> + WARN_ON(!IS_TIGERLAKE(dev_priv));
> + return PCH_TGP;
> default:
> return PCH_NONE;
> }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2508b1222d2c..3248f9959227 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -536,6 +536,7 @@ enum intel_pch {
> PCH_CNP, /* Cannon/Comet Lake PCH */
> PCH_ICP, /* Ice Lake PCH */
> PCH_MCC, /* Mule Creek Canyon PCH */
> + PCH_TGP, /* Tiger Lake PCH */
> };
>
> #define QUIRK_LVDS_SSC_DISABLE (1<<1)
> @@ -2322,6 +2323,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480
> #define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00
> #define INTEL_PCH_MCC2_DEVICE_ID_TYPE 0x3880
> +#define INTEL_PCH_TGP_DEVICE_ID_TYPE 0xA080
> #define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
> #define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
> #define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */
> @@ -2329,6 +2331,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
> #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)
> #define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
> +#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)
> #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
> #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
> #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
> --
> 2.21.0
>
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2019-07-09 12:03 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-08 23:16 [PATCH v2 00/25] Initial support for Tiger Lake Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 01/25] drm/i915: Add 4th pipe and transcoder Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 02/25] drm/i915/tgl: add initial Tiger Lake definitions Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 03/25] drm/i915/tgl: Introduce Tiger Lake PCH Lucas De Marchi
2019-07-09 12:04 ` Rodrigo Vivi [this message]
2019-07-08 23:16 ` [PATCH v2 04/25] drm/i915/tgl: Add TGL PCH detection in virtualized environment Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 05/25] drm/i915/tgl: Add TGL PCI IDs Lucas De Marchi
2019-07-09 11:52 ` Rodrigo Vivi
2019-07-09 12:26 ` Kahola, Mika
2019-07-08 23:16 ` [PATCH v2 06/25] x86/gpu: add TGL stolen memory support Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 07/25] drm/i915/tgl: Check if pipe D is fused Lucas De Marchi
2019-07-09 12:39 ` Kahola, Mika
2019-07-08 23:16 ` [PATCH v2 08/25] drm/i915/tgl: use TRANSCODER_EDP_VDSC on transcoder A Lucas De Marchi
2019-07-09 1:07 ` Souza, Jose
2019-07-09 16:01 ` Lucas De Marchi
2019-07-09 20:00 ` Manasi Navare
2019-07-10 19:49 ` [PATCH] drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use " Lucas De Marchi
2019-07-10 23:40 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 09/25] drm/i915/tgl: Add power well support Lucas De Marchi
2019-07-09 15:53 ` Ville Syrjälä
2019-07-10 19:54 ` [PATCH v3] " Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 10/25] drm/i915/tgl: Add power well to support 4th pipe Lucas De Marchi
2019-07-09 11:57 ` Rodrigo Vivi
2019-07-09 16:20 ` Lucas De Marchi
2019-07-10 11:04 ` Rodrigo Vivi
2019-07-10 16:02 ` Lucas De Marchi
2019-07-10 16:42 ` Rodrigo Vivi
2019-07-10 19:58 ` [PATCH v2] " Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 11/25] drm/i915/tgl: Add new pll ids Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 12/25] drm/i915/tgl: Add pll manager Lucas De Marchi
2019-07-09 12:14 ` Rodrigo Vivi
2019-07-08 23:16 ` [PATCH v2 13/25] drm/i915/tgl: Add additional ports for Tiger Lake Lucas De Marchi
2019-07-09 19:43 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 14/25] drm/i915/tgl: update ddi/tc clock_off bits Lucas De Marchi
2019-07-09 19:49 ` Souza, Jose
2019-07-09 19:58 ` Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 15/25] drm/i915/tgl: Add gmbus gpio pin to port mapping Lucas De Marchi
2019-07-11 0:19 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 16/25] drm/i915/tgl: port to ddc pin mapping Lucas De Marchi
2019-07-09 12:11 ` Rodrigo Vivi
2019-07-09 16:28 ` Lucas De Marchi
2019-07-09 17:00 ` [PATCH v3 " Lucas De Marchi
2019-07-10 11:01 ` Rodrigo Vivi
2019-07-08 23:16 ` [PATCH v2 17/25] drm/i915/tgl: select correct bit for port select Lucas De Marchi
2019-07-10 18:40 ` Ville Syrjälä
2019-07-10 22:52 ` Lucas De Marchi
2019-07-08 23:16 ` [PATCH v2 18/25] drm/i915/tgl: extend intel_port_is_combophy/tc Lucas De Marchi
2019-07-09 19:54 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 19/25] drm/i915/tgl: init ddi port A-C for Tiger Lake Lucas De Marchi
2019-07-09 19:55 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 20/25] drm/i915/tgl: Add vbt value mapping for DDC Bus pin Lucas De Marchi
2019-07-11 0:21 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 21/25] drm/i915/tgl: apply Display WA #1178 to fix type C dongles Lucas De Marchi
2019-07-09 12:13 ` Rodrigo Vivi
2019-07-08 23:16 ` [PATCH v2 22/25] drm/i915/gen12: MBUS B credit change Lucas De Marchi
2019-07-09 15:58 ` Ville Syrjälä
2019-07-08 23:16 ` [PATCH v2 23/25] drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization Lucas De Marchi
2019-07-09 20:10 ` Souza, Jose
2019-07-08 23:16 ` [PATCH v2 24/25] drm/i915/tgl: Add DPLL registers Lucas De Marchi
2019-07-09 12:56 ` Ville Syrjälä
2019-07-09 15:58 ` Lucas De Marchi
2019-07-10 18:43 ` Ville Syrjälä
2019-07-08 23:16 ` [PATCH v2 25/25] drm/i915/tgl: Update DPLL clock reference register Lucas De Marchi
2019-07-09 12:48 ` Ville Syrjälä
2019-07-08 23:29 ` ✗ Fi.CI.CHECKPATCH: warning for Initial support for Tiger Lake (rev2) Patchwork
2019-07-08 23:52 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-09 13:17 ` ✓ Fi.CI.IGT: " Patchwork
2019-07-09 18:24 ` ✗ Fi.CI.CHECKPATCH: warning for Initial support for Tiger Lake (rev3) Patchwork
2019-07-09 18:46 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-10 10:34 ` ✓ Fi.CI.IGT: " Patchwork
2019-07-10 20:32 ` ✗ Fi.CI.CHECKPATCH: warning for Initial support for Tiger Lake (rev6) Patchwork
2019-07-11 12:15 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-11 20:28 ` ✓ Fi.CI.IGT: " Patchwork
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