From mboxrd@z Thu Jan  1 00:00:00 1970
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v2 10/25] drm/i915/tgl: Add power well to
 support 4th pipe
Date: Wed, 10 Jul 2019 04:04:29 -0700
Message-ID: <20190710110429.GK16315@intel.com>
References: <20190708231629.9296-1-lucas.demarchi@intel.com>
 <20190708231629.9296-11-lucas.demarchi@intel.com>
 <20190709115732.GC16315@intel.com>
 <20190709162042.okv75ozrvplii7tk@ldmartin-desk1>
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