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From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Dmitry Safonov <dima@arista.com>
To: linux-kernel@vger.kernel.org
Cc: , Dmitry Safonov <0x7f454c46@gmail.com>,
	stable@vger.kernel.org, iommu@lists.linux-foundation.org,
	David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH 1/2] iommu/vt-d: Don't queue_iova() if there is no flush queue
Date: Tue, 16 Jul 2019 23:57:21 +0000	[thread overview]
Message-ID: <20190716235722.7B0AE2184C@mail.kernel.org> (raw)
In-Reply-To: <20190716213806.20456-1-dima@arista.com>

Hi,

[This is an automated email]

This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 13cf01744608 iommu/vt-d: Make use of iova deferred flushing.

The bot has tested the following trees: v5.2.1, v5.1.18, v4.19.59, v4.14.133.

v5.2.1: Build OK!
v5.1.18: Build OK!
v4.19.59: Failed to apply! Possible dependencies:
    02b4da5f84d1 ("intel-iommu: mark intel_dma_ops static")
    0bbeb01a4faf ("iommu/vt-d: Manage scalalble mode PASID tables")
    524a669bdd5f ("iommu/vt-d: remove the mapping_error dma_map_ops method")
    932a6523ce39 ("iommu/vt-d: Use dev_printk() when possible")
    964f2311a686 ("iommu/intel: small map_page cleanup")
    ef848b7e5a6a ("iommu/vt-d: Setup pasid entry for RID2PASID support")
    f7b0c4ce8cb3 ("iommu/vt-d: Flush IOTLB for untrusted device in time")

v4.14.133: Failed to apply! Possible dependencies:
    0bbeb01a4faf ("iommu/vt-d: Manage scalalble mode PASID tables")
    2e2e35d51279 ("iommu/vt-d: Missing checks for pasid tables if allocation fails")
    2f13eb7c580f ("iommu/vt-d: Enable 5-level paging mode in the PASID entry")
    3e781fcafedb ("iommu/vt-d: Remove unnecessary WARN_ON()")
    4774cc524570 ("iommu/vt-d: Apply per pci device pasid table in SVA")
    4fa064b26c2e ("iommu/vt-d: Clear pasid table entry when memory unbound")
    524a669bdd5f ("iommu/vt-d: remove the mapping_error dma_map_ops method")
    562831747f62 ("iommu/vt-d: Global PASID name space")
    7ec916f82c48 ("Revert "iommu/intel-iommu: Enable CONFIG_DMA_DIRECT_OPS=y and clean up intel_{alloc,free}_coherent()"")
    85319dcc8955 ("iommu/vt-d: Add for_each_device_domain() helper")
    932a6523ce39 ("iommu/vt-d: Use dev_printk() when possible")
    964f2311a686 ("iommu/intel: small map_page cleanup")
    971401015d14 ("iommu/vt-d: Use real PASID for flush in caching mode")
    9ddbfb42138d ("iommu/vt-d: Move device_domain_info to header")
    a7fc93fed94b ("iommu/vt-d: Allocate and free pasid table")
    af39507305fb ("iommu/vt-d: Apply global PASID in SVA")
    be9e6598aeb0 ("iommu/vt-d: Handle memory shortage on pasid table allocation")
    cc580e41260d ("iommu/vt-d: Per PCI device pasid table interfaces")
    d657c5c73ca9 ("iommu/intel-iommu: Enable CONFIG_DMA_DIRECT_OPS=y and clean up intel_{alloc,free}_coherent()")
    ef848b7e5a6a ("iommu/vt-d: Setup pasid entry for RID2PASID support")
    f7b0c4ce8cb3 ("iommu/vt-d: Flush IOTLB for untrusted device in time")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

--
Thanks,
Sasha
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  parent reply	other threads:[~2019-07-16 23:57 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-16 21:38 [PATCH 1/2] iommu/vt-d: Don't queue_iova() if there is no flush queue Dmitry Safonov via iommu
2019-07-16 21:38 ` Dmitry Safonov
2019-07-16 21:38 ` [PATCH 2/2] iommu/vt-d: Check if domain->pgd was allocated Dmitry Safonov via iommu
2019-07-16 21:38   ` Dmitry Safonov
2019-07-19  9:15   ` Lu Baolu
2019-07-19  9:15     ` Lu Baolu
2019-07-16 23:57 ` Sasha Levin [this message]
2019-07-19  9:26 ` [PATCH 1/2] iommu/vt-d: Don't queue_iova() if there is no flush queue Lu Baolu
2019-07-19  9:26   ` Lu Baolu
2019-07-22 15:44 ` Joerg Roedel
2019-07-22 15:44   ` Joerg Roedel
2019-07-23  8:17 ` Joerg Roedel
2019-07-23  8:17   ` Joerg Roedel
2019-07-23  8:49   ` Dmitry Safonov via iommu

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