* [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G
@ 2019-07-11 10:32 Ville Syrjala
2019-07-11 10:32 ` [PATCH v2 1/5] drm/edid: Add CTA-861-G modes with VIC < 128 Ville Syrjala
` (7 more replies)
0 siblings, 8 replies; 13+ messages in thread
From: Ville Syrjala @ 2019-07-11 10:32 UTC (permalink / raw)
To: dri-devel; +Cc: Manasi Navare, Hans Verkuil, intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reposting a series from 1-2 years ago. I did toss in one extra patch at
the end to boost our confidence a bit bit.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Ville Syrjälä (5):
drm/edid: Add CTA-861-G modes with VIC < 128
drm/edid: Abstract away cea_edid_modes[]
drm/edid: Add CTA-861-G modes with VIC >= 193
drm/edid: Throw away the dummy VIC 0 cea mode
drm/edid: Make sure the CEA mode arrays have the correct amount of
modes
drivers/gpu/drm/drm_edid.c | 330 ++++++++++++++++++++++++++++++++++---
1 file changed, 306 insertions(+), 24 deletions(-)
--
2.21.0
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^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH v2 1/5] drm/edid: Add CTA-861-G modes with VIC < 128 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala @ 2019-07-11 10:32 ` Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala ` (6 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Ville Syrjala @ 2019-07-11 10:32 UTC (permalink / raw) To: dri-devel; +Cc: Manasi Navare, Hans Verkuil, intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Fill out our list of cea modes with the new stuff from CTA-861-G. We only do the modes with VIC < 128 here. Adding the higher numbered VICs will need some slight code refactoring first. Cc: Hans Verkuil <hansverk@cisco.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/drm_edid.c | 100 +++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 82a4ceed3fcf..bcd9ed569d64 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -1275,6 +1275,106 @@ static const struct drm_display_mode edid_cea_modes[] = { 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 108 - 1280x720@48Hz 16:9 */ + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240, + 2280, 2500, 0, 720, 725, 730, 750, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 109 - 1280x720@48Hz 64:27 */ + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240, + 2280, 2500, 0, 720, 725, 730, 750, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 110 - 1680x720@48Hz 64:27 */ + { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 2490, + 2530, 2750, 0, 720, 725, 730, 750, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 111 - 1920x1080@48Hz 16:9 */ + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558, + 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 112 - 1920x1080@48Hz 64:27 */ + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558, + 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 113 - 2560x1080@48Hz 64:27 */ + { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 3558, + 3602, 3750, 0, 1080, 1084, 1089, 1100, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 114 - 3840x2160@48Hz 16:9 */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116, + 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 115 - 4096x2160@48Hz 256:135 */ + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5116, + 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + /* 116 - 3840x2160@48Hz 64:27 */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116, + 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 117 - 3840x2160@100Hz 16:9 */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896, + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 118 - 3840x2160@120Hz 16:9 */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016, + 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 119 - 3840x2160@100Hz 64:27 */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896, + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 120 - 3840x2160@120Hz 64:27 */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016, + 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 121 - 5120x2160@24Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 7116, + 7204, 7500, 0, 2160, 2168, 2178, 2200, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 122 - 5120x2160@25Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 6816, + 6904, 7200, 0, 2160, 2168, 2178, 2200, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 123 - 5120x2160@30Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 5784, + 5872, 6000, 0, 2160, 2168, 2178, 2200, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 124 - 5120x2160@48Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5866, + 5954, 6250, 0, 2160, 2168, 2178, 2475, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 125 - 5120x2160@50Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 6216, + 6304, 6600, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 126 - 5120x2160@60Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5284, + 5372, 5500, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 127 - 5120x2160@100Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 6216, + 6304, 6600, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, }; /* -- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 1/5] drm/edid: Add CTA-861-G modes with VIC < 128 Ville Syrjala @ 2019-07-11 10:32 ` Ville Syrjala 2019-07-19 8:45 ` Sharma, Shashank 2019-07-11 10:32 ` [PATCH v2 3/5] drm/edid: Add CTA-861-G modes with VIC >= 193 Ville Syrjala ` (5 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Ville Syrjala @ 2019-07-11 10:32 UTC (permalink / raw) To: dri-devel; +Cc: Manasi Navare, Hans Verkuil, intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> We're going to need two cea mode tables (on for VICs < 128, another one for VICs >= 193). To that end replace the direct edid_cea_modes[] lookups with a function call. And we'll rename the array to edid_cea_modes_0[] to indicathe how it's to be indexed. Cc: Hans Verkuil <hansverk@cisco.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++----------- 1 file changed, 58 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index bcd9ed569d64..703d2bc26fd9 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = { }; /* - * Probably taken from CEA-861 spec. - * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. + * From CEA/CTA-861 spec. * - * Index using the VIC. + * Index with VIC. */ -static const struct drm_display_mode edid_cea_modes[] = { +static const struct drm_display_mode edid_cea_modes_0[] = { /* 0 - dummy, VICs start at 1 */ { }, /* 1 - 640x480@60Hz 4:3 */ @@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid) return cea; } +static const struct drm_display_mode *cea_mode_for_vic(u8 vic) +{ + if (!vic) + return NULL; + if (vic < ARRAY_SIZE(edid_cea_modes_0)) + return &edid_cea_modes_0[vic]; + return NULL; +} + +static u8 cea_num_vics(void) +{ + return ARRAY_SIZE(edid_cea_modes_0); +} + +static u8 cea_next_vic(u8 vic) +{ + return vic + 1; +} + /* * Calculate the alternate clock for the CEA mode * (60Hz vs. 59.94Hz etc.) @@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode) * get the other variants by simply increasing the * vertical front porch length. */ - BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 || - edid_cea_modes[9].vtotal != 262 || - edid_cea_modes[12].vtotal != 262 || - edid_cea_modes[13].vtotal != 262 || - edid_cea_modes[23].vtotal != 312 || - edid_cea_modes[24].vtotal != 312 || - edid_cea_modes[27].vtotal != 312 || - edid_cea_modes[28].vtotal != 312); + BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 || + cea_mode_for_vic(9)->vtotal != 262 || + cea_mode_for_vic(12)->vtotal != 262 || + cea_mode_for_vic(13)->vtotal != 262 || + cea_mode_for_vic(23)->vtotal != 312 || + cea_mode_for_vic(24)->vtotal != 312 || + cea_mode_for_vic(27)->vtotal != 312 || + cea_mode_for_vic(28)->vtotal != 312); if (((vic == 8 || vic == 9 || vic == 12 || vic == 13) && mode->vtotal < 263) || @@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m if (to_match->picture_aspect_ratio) match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) { - struct drm_display_mode cea_mode = edid_cea_modes[vic]; + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) { + const struct drm_display_mode *mode = cea_mode_for_vic(vic); + struct drm_display_mode cea_mode; unsigned int clock1, clock2; + if (!mode) + continue; + + cea_mode = *mode; + /* Check both 60Hz and 59.94Hz */ clock1 = cea_mode.clock; clock2 = cea_mode_alternate_clock(&cea_mode); @@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match) if (to_match->picture_aspect_ratio) match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) { - struct drm_display_mode cea_mode = edid_cea_modes[vic]; + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) { + const struct drm_display_mode *mode = cea_mode_for_vic(vic); + struct drm_display_mode cea_mode; unsigned int clock1, clock2; + if (!mode) + continue; + + cea_mode = *mode; + /* Check both 60Hz and 59.94Hz */ clock1 = cea_mode.clock; clock2 = cea_mode_alternate_clock(&cea_mode); @@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode); static bool drm_valid_cea_vic(u8 vic) { - return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes); + return cea_mode_for_vic(vic) != NULL; } /** @@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic) */ enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code) { - return edid_cea_modes[video_code].picture_aspect_ratio; + const struct drm_display_mode *mode; + + mode = cea_mode_for_vic(video_code); + if (mode) + return mode->picture_aspect_ratio; + + return HDMI_PICTURE_ASPECT_NONE; } EXPORT_SYMBOL(drm_get_cea_aspect_ratio); @@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) unsigned int clock1, clock2; if (drm_valid_cea_vic(vic)) { - cea_mode = &edid_cea_modes[vic]; + cea_mode = cea_mode_for_vic(vic); clock2 = cea_mode_alternate_clock(cea_mode); } else { vic = drm_match_hdmi_mode(mode); @@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector, if (!drm_valid_cea_vic(vic)) return NULL; - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic)); if (!newmode) return NULL; @@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector, if (!drm_valid_cea_vic(vic)) continue; - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic)); if (!newmode) break; bitmap_set(hdmi->y420_vdb_modes, vic, 1); @@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode) vic = drm_match_cea_mode_clock_tolerance(mode, 5); if (drm_valid_cea_vic(vic)) { type = "CEA"; - cea_mode = &edid_cea_modes[vic]; + cea_mode = cea_mode_for_vic(vic); clock1 = cea_mode->clock; clock2 = cea_mode_alternate_clock(cea_mode); } else { -- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] 2019-07-11 10:32 ` [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala @ 2019-07-19 8:45 ` Sharma, Shashank 2019-07-19 11:57 ` Ville Syrjälä 0 siblings, 1 reply; 13+ messages in thread From: Sharma, Shashank @ 2019-07-19 8:45 UTC (permalink / raw) To: Ville Syrjala, dri-devel; +Cc: Hans Verkuil, intel-gfx Hi Ville, On 7/11/2019 4:02 PM, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > We're going to need two cea mode tables (on for VICs < 128, > another one for VICs >= 193). To that end replace the direct > edid_cea_modes[] lookups with a function call. And we'll rename > the array to edid_cea_modes_0[] to indicathe how it's to be > indexed. I am not very sure if its a good idea to split into two different tables, or adding multiple dummy placeholder modes (like VIC 0) for the modes not available. It could give us continuity and we can keep on using almost the same functions. We can just add some checks for range between VIC 128 - 193. Just a thought. - Shashank > Cc: Hans Verkuil <hansverk@cisco.com> > Cc: Shashank Sharma <shashank.sharma@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++----------- > 1 file changed, 58 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index bcd9ed569d64..703d2bc26fd9 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = { > }; > > /* > - * Probably taken from CEA-861 spec. > - * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. > + * From CEA/CTA-861 spec. > * > - * Index using the VIC. > + * Index with VIC. > */ > -static const struct drm_display_mode edid_cea_modes[] = { > +static const struct drm_display_mode edid_cea_modes_0[] = { > /* 0 - dummy, VICs start at 1 */ > { }, > /* 1 - 640x480@60Hz 4:3 */ > @@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid) > return cea; > } > > +static const struct drm_display_mode *cea_mode_for_vic(u8 vic) > +{ > + if (!vic) > + return NULL; > + if (vic < ARRAY_SIZE(edid_cea_modes_0)) > + return &edid_cea_modes_0[vic]; > + return NULL; > +} > + > +static u8 cea_num_vics(void) > +{ > + return ARRAY_SIZE(edid_cea_modes_0); > +} > + > +static u8 cea_next_vic(u8 vic) > +{ > + return vic + 1; > +} > + > /* > * Calculate the alternate clock for the CEA mode > * (60Hz vs. 59.94Hz etc.) > @@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode) > * get the other variants by simply increasing the > * vertical front porch length. > */ > - BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 || > - edid_cea_modes[9].vtotal != 262 || > - edid_cea_modes[12].vtotal != 262 || > - edid_cea_modes[13].vtotal != 262 || > - edid_cea_modes[23].vtotal != 312 || > - edid_cea_modes[24].vtotal != 312 || > - edid_cea_modes[27].vtotal != 312 || > - edid_cea_modes[28].vtotal != 312); > + BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 || > + cea_mode_for_vic(9)->vtotal != 262 || > + cea_mode_for_vic(12)->vtotal != 262 || > + cea_mode_for_vic(13)->vtotal != 262 || > + cea_mode_for_vic(23)->vtotal != 312 || > + cea_mode_for_vic(24)->vtotal != 312 || > + cea_mode_for_vic(27)->vtotal != 312 || > + cea_mode_for_vic(28)->vtotal != 312); > > if (((vic == 8 || vic == 9 || > vic == 12 || vic == 13) && mode->vtotal < 263) || > @@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m > if (to_match->picture_aspect_ratio) > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; > > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) { > - struct drm_display_mode cea_mode = edid_cea_modes[vic]; > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) { > + const struct drm_display_mode *mode = cea_mode_for_vic(vic); > + struct drm_display_mode cea_mode; > unsigned int clock1, clock2; > > + if (!mode) > + continue; > + > + cea_mode = *mode; > + > /* Check both 60Hz and 59.94Hz */ > clock1 = cea_mode.clock; > clock2 = cea_mode_alternate_clock(&cea_mode); > @@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match) > if (to_match->picture_aspect_ratio) > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; > > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) { > - struct drm_display_mode cea_mode = edid_cea_modes[vic]; > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) { > + const struct drm_display_mode *mode = cea_mode_for_vic(vic); > + struct drm_display_mode cea_mode; > unsigned int clock1, clock2; > > + if (!mode) > + continue; > + > + cea_mode = *mode; > + > /* Check both 60Hz and 59.94Hz */ > clock1 = cea_mode.clock; > clock2 = cea_mode_alternate_clock(&cea_mode); > @@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode); > > static bool drm_valid_cea_vic(u8 vic) > { > - return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes); > + return cea_mode_for_vic(vic) != NULL; > } > > /** > @@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic) > */ > enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code) > { > - return edid_cea_modes[video_code].picture_aspect_ratio; > + const struct drm_display_mode *mode; > + > + mode = cea_mode_for_vic(video_code); > + if (mode) > + return mode->picture_aspect_ratio; > + > + return HDMI_PICTURE_ASPECT_NONE; > } > EXPORT_SYMBOL(drm_get_cea_aspect_ratio); > > @@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) > unsigned int clock1, clock2; > > if (drm_valid_cea_vic(vic)) { > - cea_mode = &edid_cea_modes[vic]; > + cea_mode = cea_mode_for_vic(vic); > clock2 = cea_mode_alternate_clock(cea_mode); > } else { > vic = drm_match_hdmi_mode(mode); > @@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector, > if (!drm_valid_cea_vic(vic)) > return NULL; > > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic)); > if (!newmode) > return NULL; > > @@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector, > if (!drm_valid_cea_vic(vic)) > continue; > > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic)); > if (!newmode) > break; > bitmap_set(hdmi->y420_vdb_modes, vic, 1); > @@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode) > vic = drm_match_cea_mode_clock_tolerance(mode, 5); > if (drm_valid_cea_vic(vic)) { > type = "CEA"; > - cea_mode = &edid_cea_modes[vic]; > + cea_mode = cea_mode_for_vic(vic); > clock1 = cea_mode->clock; > clock2 = cea_mode_alternate_clock(cea_mode); > } else { _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] 2019-07-19 8:45 ` Sharma, Shashank @ 2019-07-19 11:57 ` Ville Syrjälä 2019-07-19 12:13 ` Ville Syrjälä 0 siblings, 1 reply; 13+ messages in thread From: Ville Syrjälä @ 2019-07-19 11:57 UTC (permalink / raw) To: Sharma, Shashank; +Cc: Manasi Navare, Hans Verkuil, intel-gfx, dri-devel On Fri, Jul 19, 2019 at 02:15:34PM +0530, Sharma, Shashank wrote: > Hi Ville, > > On 7/11/2019 4:02 PM, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > We're going to need two cea mode tables (on for VICs < 128, > > another one for VICs >= 193). To that end replace the direct > > edid_cea_modes[] lookups with a function call. And we'll rename > > the array to edid_cea_modes_0[] to indicathe how it's to be > > indexed. > > I am not very sure if its a good idea to split into two different > tables, or adding multiple dummy placeholder modes (like VIC 0) for the > modes not available. It could give us continuity and we can keep on > using almost the same functions. We can just add some checks for range > between VIC 128 - 193. Just a thought. These things take 208 bytes each. Blowing away 40 KiB for zeroes seems quite silly. And with the abstraction in place you don't have to worry about such implementation details at all. > > - Shashank > > > Cc: Hans Verkuil <hansverk@cisco.com> > > Cc: Shashank Sharma <shashank.sharma@intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++----------- > > 1 file changed, 58 insertions(+), 22 deletions(-) > > > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > > index bcd9ed569d64..703d2bc26fd9 100644 > > --- a/drivers/gpu/drm/drm_edid.c > > +++ b/drivers/gpu/drm/drm_edid.c > > @@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = { > > }; > > > > /* > > - * Probably taken from CEA-861 spec. > > - * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. > > + * From CEA/CTA-861 spec. > > * > > - * Index using the VIC. > > + * Index with VIC. > > */ > > -static const struct drm_display_mode edid_cea_modes[] = { > > +static const struct drm_display_mode edid_cea_modes_0[] = { > > /* 0 - dummy, VICs start at 1 */ > > { }, > > /* 1 - 640x480@60Hz 4:3 */ > > @@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid) > > return cea; > > } > > > > +static const struct drm_display_mode *cea_mode_for_vic(u8 vic) > > +{ > > + if (!vic) > > + return NULL; > > + if (vic < ARRAY_SIZE(edid_cea_modes_0)) > > + return &edid_cea_modes_0[vic]; > > + return NULL; > > +} > > + > > +static u8 cea_num_vics(void) > > +{ > > + return ARRAY_SIZE(edid_cea_modes_0); > > +} > > + > > +static u8 cea_next_vic(u8 vic) > > +{ > > + return vic + 1; > > +} > > + > > /* > > * Calculate the alternate clock for the CEA mode > > * (60Hz vs. 59.94Hz etc.) > > @@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode) > > * get the other variants by simply increasing the > > * vertical front porch length. > > */ > > - BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 || > > - edid_cea_modes[9].vtotal != 262 || > > - edid_cea_modes[12].vtotal != 262 || > > - edid_cea_modes[13].vtotal != 262 || > > - edid_cea_modes[23].vtotal != 312 || > > - edid_cea_modes[24].vtotal != 312 || > > - edid_cea_modes[27].vtotal != 312 || > > - edid_cea_modes[28].vtotal != 312); > > + BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 || > > + cea_mode_for_vic(9)->vtotal != 262 || > > + cea_mode_for_vic(12)->vtotal != 262 || > > + cea_mode_for_vic(13)->vtotal != 262 || > > + cea_mode_for_vic(23)->vtotal != 312 || > > + cea_mode_for_vic(24)->vtotal != 312 || > > + cea_mode_for_vic(27)->vtotal != 312 || > > + cea_mode_for_vic(28)->vtotal != 312); > > > > if (((vic == 8 || vic == 9 || > > vic == 12 || vic == 13) && mode->vtotal < 263) || > > @@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m > > if (to_match->picture_aspect_ratio) > > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; > > > > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) { > > - struct drm_display_mode cea_mode = edid_cea_modes[vic]; > > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) { > > + const struct drm_display_mode *mode = cea_mode_for_vic(vic); > > + struct drm_display_mode cea_mode; > > unsigned int clock1, clock2; > > > > + if (!mode) > > + continue; > > + > > + cea_mode = *mode; > > + > > /* Check both 60Hz and 59.94Hz */ > > clock1 = cea_mode.clock; > > clock2 = cea_mode_alternate_clock(&cea_mode); > > @@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match) > > if (to_match->picture_aspect_ratio) > > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; > > > > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) { > > - struct drm_display_mode cea_mode = edid_cea_modes[vic]; > > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) { > > + const struct drm_display_mode *mode = cea_mode_for_vic(vic); > > + struct drm_display_mode cea_mode; > > unsigned int clock1, clock2; > > > > + if (!mode) > > + continue; > > + > > + cea_mode = *mode; > > + > > /* Check both 60Hz and 59.94Hz */ > > clock1 = cea_mode.clock; > > clock2 = cea_mode_alternate_clock(&cea_mode); > > @@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode); > > > > static bool drm_valid_cea_vic(u8 vic) > > { > > - return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes); > > + return cea_mode_for_vic(vic) != NULL; > > } > > > > /** > > @@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic) > > */ > > enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code) > > { > > - return edid_cea_modes[video_code].picture_aspect_ratio; > > + const struct drm_display_mode *mode; > > + > > + mode = cea_mode_for_vic(video_code); > > + if (mode) > > + return mode->picture_aspect_ratio; > > + > > + return HDMI_PICTURE_ASPECT_NONE; > > } > > EXPORT_SYMBOL(drm_get_cea_aspect_ratio); > > > > @@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) > > unsigned int clock1, clock2; > > > > if (drm_valid_cea_vic(vic)) { > > - cea_mode = &edid_cea_modes[vic]; > > + cea_mode = cea_mode_for_vic(vic); > > clock2 = cea_mode_alternate_clock(cea_mode); > > } else { > > vic = drm_match_hdmi_mode(mode); > > @@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector, > > if (!drm_valid_cea_vic(vic)) > > return NULL; > > > > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); > > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic)); > > if (!newmode) > > return NULL; > > > > @@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector, > > if (!drm_valid_cea_vic(vic)) > > continue; > > > > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); > > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic)); > > if (!newmode) > > break; > > bitmap_set(hdmi->y420_vdb_modes, vic, 1); > > @@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode) > > vic = drm_match_cea_mode_clock_tolerance(mode, 5); > > if (drm_valid_cea_vic(vic)) { > > type = "CEA"; > > - cea_mode = &edid_cea_modes[vic]; > > + cea_mode = cea_mode_for_vic(vic); > > clock1 = cea_mode->clock; > > clock2 = cea_mode_alternate_clock(cea_mode); > > } else { -- Ville Syrjälä Intel _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] 2019-07-19 11:57 ` Ville Syrjälä @ 2019-07-19 12:13 ` Ville Syrjälä 0 siblings, 0 replies; 13+ messages in thread From: Ville Syrjälä @ 2019-07-19 12:13 UTC (permalink / raw) To: Sharma, Shashank; +Cc: Hans Verkuil, intel-gfx, dri-devel On Fri, Jul 19, 2019 at 02:57:51PM +0300, Ville Syrjälä wrote: > On Fri, Jul 19, 2019 at 02:15:34PM +0530, Sharma, Shashank wrote: > > Hi Ville, > > > > On 7/11/2019 4:02 PM, Ville Syrjala wrote: > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > > > We're going to need two cea mode tables (on for VICs < 128, > > > another one for VICs >= 193). To that end replace the direct > > > edid_cea_modes[] lookups with a function call. And we'll rename > > > the array to edid_cea_modes_0[] to indicathe how it's to be > > > indexed. > > > > I am not very sure if its a good idea to split into two different > > tables, or adding multiple dummy placeholder modes (like VIC 0) for the > > modes not available. It could give us continuity and we can keep on > > using almost the same functions. We can just add some checks for range > > between VIC 128 - 193. Just a thought. > > These things take 208 bytes each. Blowing away 40 KiB for zeroes Also we should probably think about shrinking these things a bit. A (suspiciously?) easy start would be to s/int/u16/ for most of the timings. Though not sure how many years we have until 64k displays become a thing. Also having an int for {width,height}_mm is probably overkill. Or at least I haven't heard of anyone having 2000km wide displays yet. I couldn't even fit one in Finland anyway. u16 would still give us ~65m which seems plenty. 'type' I think could fit into u8. Then we have '*private'. Maybe totally unused? Also not sure if we really need 'name[]'. Maybe we can just generate it on demand? Might be tied in with the uabi I guess so maybe can't kill it. Depending on the length of a typical name switching to a pointer might save some bytes though. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 3/5] drm/edid: Add CTA-861-G modes with VIC >= 193 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 1/5] drm/edid: Add CTA-861-G modes with VIC < 128 Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala @ 2019-07-11 10:32 ` Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 4/5] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala ` (4 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Ville Syrjala @ 2019-07-11 10:32 UTC (permalink / raw) To: dri-devel; +Cc: Manasi Navare, Hans Verkuil, intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Add a second table to the cea modes with VIC >= 193. Cc: Hans Verkuil <hansverk@cisco.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++- 1 file changed, 149 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 703d2bc26fd9..0e103c99e471 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = { .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, }; +/* + * From CEA/CTA-861 spec. + * + * Index with VIC-193. + */ +static const struct drm_display_mode edid_cea_modes_193[] = { + /* 193 - 5120x2160@120Hz 64:27 */ + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284, + 5372, 5500, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 194 - 7680x4320@24Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232, + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 195 - 7680x4320@25Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032, + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 196 - 7680x4320@30Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232, + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 197 - 7680x4320@48Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232, + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 198 - 7680x4320@50Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032, + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 199 - 7680x4320@60Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232, + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 200 - 7680x4320@100Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792, + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 201 - 7680x4320@120Hz 16:9 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032, + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 202 - 7680x4320@24Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232, + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 203 - 7680x4320@25Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032, + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 204 - 7680x4320@30Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232, + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 205 - 7680x4320@48Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232, + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 206 - 7680x4320@50Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032, + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 207 - 7680x4320@60Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232, + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 208 - 7680x4320@100Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792, + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 209 - 7680x4320@120Hz 64:27 */ + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032, + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 210 - 10240x4320@24Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732, + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 211 - 10240x4320@25Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732, + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 212 - 10240x4320@30Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528, + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 213 - 10240x4320@48Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732, + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 214 - 10240x4320@50Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732, + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 215 - 10240x4320@60Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528, + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 216 - 10240x4320@100Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432, + 12608, 13200, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 217 - 10240x4320@120Hz 64:27 */ + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528, + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + /* 218 - 4096x2160@100Hz 256:135 */ + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896, + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + /* 219 - 4096x2160@120Hz 256:135 */ + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184, + 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, +}; + /* * HDMI 1.4 4k modes. Index using the VIC. */ @@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic) return NULL; if (vic < ARRAY_SIZE(edid_cea_modes_0)) return &edid_cea_modes_0[vic]; + if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193)) + return &edid_cea_modes_193[vic - 193]; return NULL; } static u8 cea_num_vics(void) { - return ARRAY_SIZE(edid_cea_modes_0); + return 193 + ARRAY_SIZE(edid_cea_modes_193); } static u8 cea_next_vic(u8 vic) { - return vic + 1; + if (++vic == ARRAY_SIZE(edid_cea_modes_0)) + vic = 193; + return vic; } /* -- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/5] drm/edid: Throw away the dummy VIC 0 cea mode 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala ` (2 preceding siblings ...) 2019-07-11 10:32 ` [PATCH v2 3/5] drm/edid: Add CTA-861-G modes with VIC >= 193 Ville Syrjala @ 2019-07-11 10:32 ` Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 5/5] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala ` (3 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Ville Syrjala @ 2019-07-11 10:32 UTC (permalink / raw) To: dri-devel; +Cc: Manasi Navare, Hans Verkuil, intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Now that the cea mode handling is not 100% tied to the single array the dummy VIC 0 mode is pretty much pointles. Throw it out. Cc: Hans Verkuil <hansverk@cisco.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/drm_edid.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 0e103c99e471..e6b1e785d158 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = { /* * From CEA/CTA-861 spec. * - * Index with VIC. + * Index with VIC-1. */ -static const struct drm_display_mode edid_cea_modes_0[] = { - /* 0 - dummy, VICs start at 1 */ - { }, +static const struct drm_display_mode edid_cea_modes_1[] = { /* 1 - 640x480@60Hz 4:3 */ { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, @@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid) static const struct drm_display_mode *cea_mode_for_vic(u8 vic) { - if (!vic) - return NULL; - if (vic < ARRAY_SIZE(edid_cea_modes_0)) - return &edid_cea_modes_0[vic]; + if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1)) + return &edid_cea_modes_1[vic - 1]; if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193)) return &edid_cea_modes_193[vic - 193]; return NULL; @@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void) static u8 cea_next_vic(u8 vic) { - if (++vic == ARRAY_SIZE(edid_cea_modes_0)) + if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1)) vic = 193; return vic; } -- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 5/5] drm/edid: Make sure the CEA mode arrays have the correct amount of modes 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala ` (3 preceding siblings ...) 2019-07-11 10:32 ` [PATCH v2 4/5] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala @ 2019-07-11 10:32 ` Ville Syrjala 2019-07-11 14:42 ` Ville Syrjälä 2019-07-11 12:49 ` ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G Patchwork ` (2 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Ville Syrjala @ 2019-07-11 10:32 UTC (permalink / raw) To: dri-devel; +Cc: Hans Verkuil, intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> We depend on a specific relationship between the VIC number and the index in the CEA mode arrays. Assert that the arrays have the excpected size to make sure we've not accidentally left holes in them. Cc: Hans Verkuil <hansverk@cisco.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/drm_edid.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index e6b1e785d158..f0b449225727 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3209,6 +3209,9 @@ static u8 *drm_find_cea_extension(const struct edid *edid) static const struct drm_display_mode *cea_mode_for_vic(u8 vic) { + BUILD_BUG_ON(ARRAY_SIZE(edid_cea_modes_1) != 127); + BUILD_BUG_ON(ARRAY_SIZE(edid_cea_modes_193) != 27); + if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1)) return &edid_cea_modes_1[vic - 1]; if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193)) -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2 5/5] drm/edid: Make sure the CEA mode arrays have the correct amount of modes 2019-07-11 10:32 ` [PATCH v2 5/5] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala @ 2019-07-11 14:42 ` Ville Syrjälä 0 siblings, 0 replies; 13+ messages in thread From: Ville Syrjälä @ 2019-07-11 14:42 UTC (permalink / raw) To: dri-devel; +Cc: Hans Verkuil, intel-gfx On Thu, Jul 11, 2019 at 01:32:34PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > We depend on a specific relationship between the VIC number and the > index in the CEA mode arrays. Assert that the arrays have the excpected > size to make sure we've not accidentally left holes in them. > > Cc: Hans Verkuil <hansverk@cisco.com> > Cc: Shashank Sharma <shashank.sharma@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/drm_edid.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index e6b1e785d158..f0b449225727 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3209,6 +3209,9 @@ static u8 *drm_find_cea_extension(const struct edid *edid) > > static const struct drm_display_mode *cea_mode_for_vic(u8 vic) > { > + BUILD_BUG_ON(ARRAY_SIZE(edid_cea_modes_1) != 127); > + BUILD_BUG_ON(ARRAY_SIZE(edid_cea_modes_193) != 27); Maybe better to write these as something like BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127); BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219); to make it super trivial to cross check against the VICs of the first and last entry in the arrays. > + > if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1)) > return &edid_cea_modes_1[vic - 1]; > if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193)) > -- > 2.21.0 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala ` (4 preceding siblings ...) 2019-07-11 10:32 ` [PATCH v2 5/5] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala @ 2019-07-11 12:49 ` Patchwork 2019-07-11 16:25 ` ✓ Fi.CI.BAT: success " Patchwork 2019-07-12 14:36 ` ✓ Fi.CI.IGT: " Patchwork 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-07-11 12:49 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx == Series Details == Series: drm/edid: Add new modes from CTA-861-G URL : https://patchwork.freedesktop.org/series/63554/ State : warning == Summary == $ dim checkpatch origin/drm-tip 04c1e8935b2a drm/edid: Add CTA-861-G modes with VIC < 128 1616f2361bc5 drm/edid: Abstract away cea_edid_modes[] -:131: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "cea_mode_for_vic" #131: FILE: drivers/gpu/drm/drm_edid.c:3235: + return cea_mode_for_vic(vic) != NULL; total: 0 errors, 0 warnings, 1 checks, 152 lines checked 72a1da8ed5f6 drm/edid: Add CTA-861-G modes with VIC >= 193 252fbde36820 drm/edid: Throw away the dummy VIC 0 cea mode edc08ee6d32b drm/edid: Make sure the CEA mode arrays have the correct amount of modes _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Fi.CI.BAT: success for drm/edid: Add new modes from CTA-861-G 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala ` (5 preceding siblings ...) 2019-07-11 12:49 ` ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G Patchwork @ 2019-07-11 16:25 ` Patchwork 2019-07-12 14:36 ` ✓ Fi.CI.IGT: " Patchwork 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-07-11 16:25 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx == Series Details == Series: drm/edid: Add new modes from CTA-861-G URL : https://patchwork.freedesktop.org/series/63554/ State : success == Summary == CI Bug Log - changes from CI_DRM_6458 -> Patchwork_13622 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/ Known issues ------------ Here are the changes found in Patchwork_13622 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_module_load@reload: - fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/fi-blb-e6850/igt@i915_module_load@reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/fi-blb-e6850/igt@i915_module_load@reload.html * igt@i915_selftest@live_execlists: - fi-skl-gvtdvm: [PASS][3] -> [DMESG-FAIL][4] ([fdo#111108]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_sanitycheck: - fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html #### Possible fixes #### * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [FAIL][7] ([fdo#108511]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111046 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111046 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108 Participating hosts (53 -> 46) ------------------------------ Missing (7): fi-kbl-soraka fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_6458 -> Patchwork_13622 CI_DRM_6458: fe4d1459b31768c40f907bb859f25197e1af2d07 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5093: 86dc48ede7c33bf69e15f84179d2f9e5b84c179b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13622: edc08ee6d32bca5ba5976780de3119ff94822617 @ git://anongit.freedesktop.org/gfx-ci/linux == Kernel 32bit build == Warning: Kernel 32bit buildtest failed: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/build_32bit.log CALL scripts/checksyscalls.sh CALL scripts/atomic/check-atomics.sh CHK include/generated/compile.h Kernel: arch/x86/boot/bzImage is ready (#1) Building modules, stage 2. MODPOST 112 modules ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! scripts/Makefile.modpost:91: recipe for target '__modpost' failed make[1]: *** [__modpost] Error 1 Makefile:1287: recipe for target 'modules' failed make: *** [modules] Error 2 == Linux commits == edc08ee6d32b drm/edid: Make sure the CEA mode arrays have the correct amount of modes 252fbde36820 drm/edid: Throw away the dummy VIC 0 cea mode 72a1da8ed5f6 drm/edid: Add CTA-861-G modes with VIC >= 193 1616f2361bc5 drm/edid: Abstract away cea_edid_modes[] 04c1e8935b2a drm/edid: Add CTA-861-G modes with VIC < 128 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Fi.CI.IGT: success for drm/edid: Add new modes from CTA-861-G 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala ` (6 preceding siblings ...) 2019-07-11 16:25 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-07-12 14:36 ` Patchwork 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-07-12 14:36 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx == Series Details == Series: drm/edid: Add new modes from CTA-861-G URL : https://patchwork.freedesktop.org/series/63554/ State : success == Summary == CI Bug Log - changes from CI_DRM_6458_full -> Patchwork_13622_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_13622_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb2/igt@gem_exec_balancer@smoke.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb3/igt@gem_exec_balancer@smoke.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl8/igt@gem_workarounds@suspend-resume-context.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-apl6/igt@gem_workarounds@suspend-resume-context.html * igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen: - shard-kbl: [PASS][5] -> [FAIL][6] ([fdo#103232]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html - shard-apl: [PASS][7] -> [FAIL][8] ([fdo#103232]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: - shard-hsw: [PASS][9] -> [FAIL][10] ([fdo#105767]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-hsw5/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([fdo#103540]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-hsw5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-hsw5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc: - shard-iclb: [PASS][13] -> [INCOMPLETE][14] ([fdo#107713]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +5 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-1p-rte: - shard-glk: [PASS][17] -> [FAIL][18] ([fdo#103167] / [fdo#110378]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-glk2/igt@kms_frontbuffer_tracking@fbc-1p-rte.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-glk9/igt@kms_frontbuffer_tracking@fbc-1p-rte.html - shard-kbl: [PASS][19] -> [FAIL][20] ([fdo#103167] / [fdo#110378]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-rte.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-rte.html - shard-apl: [PASS][21] -> [FAIL][22] ([fdo#103167] / [fdo#110378]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl1/igt@kms_frontbuffer_tracking@fbc-1p-rte.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-apl6/igt@kms_frontbuffer_tracking@fbc-1p-rte.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103166]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-y.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-y.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb5/igt@kms_psr@psr2_cursor_render.html #### Possible fixes #### * igt@gem_ctx_isolation@vecs0-s3: - shard-apl: [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] +3 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl2/igt@gem_ctx_isolation@vecs0-s3.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-apl6/igt@gem_ctx_isolation@vecs0-s3.html * igt@i915_pm_backlight@fade_with_suspend: - shard-skl: [INCOMPLETE][29] ([fdo#104108]) -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl1/igt@i915_pm_backlight@fade_with_suspend.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-skl10/igt@i915_pm_backlight@fade_with_suspend.html * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-snb: [SKIP][31] ([fdo#109271]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-snb5/igt@i915_pm_rc6_residency@rc6-accuracy.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-snb1/igt@i915_pm_rc6_residency@rc6-accuracy.html * igt@i915_pm_rpm@system-suspend: - shard-kbl: [INCOMPLETE][33] ([fdo#103665] / [fdo#107807]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl6/igt@i915_pm_rpm@system-suspend.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-kbl4/igt@i915_pm_rpm@system-suspend.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic: - shard-iclb: [INCOMPLETE][35] ([fdo#107713]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb6/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [FAIL][37] ([fdo#104873]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-glk: [FAIL][39] ([fdo#103060]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-glk7/igt@kms_flip@dpms-vs-vblank-race-interruptible.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-glk7/igt@kms_flip@dpms-vs-vblank-race-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [FAIL][41] ([fdo#105363]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend: - shard-hsw: [INCOMPLETE][43] ([fdo#103540]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-hsw5/igt@kms_flip@flip-vs-suspend.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-hsw5/igt@kms_flip@flip-vs-suspend.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt: - shard-iclb: [FAIL][45] ([fdo#103167]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt: - shard-glk: [FAIL][47] ([fdo#103167]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-glk5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [FAIL][49] ([fdo#108145]) -> [PASS][50] +1 similar issue [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [FAIL][51] ([fdo#103166]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb2/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr2_su@page_flip: - shard-iclb: [SKIP][53] ([fdo#109642] / [fdo#111068]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb5/igt@kms_psr2_su@page_flip.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb2/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_sprite_plane_onoff: - shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb8/igt@kms_psr@psr2_sprite_plane_onoff.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html * igt@kms_setmode@basic: - shard-apl: [FAIL][57] ([fdo#99912]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl2/igt@kms_setmode@basic.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-apl1/igt@kms_setmode@basic.html #### Warnings #### * igt@gem_softpin@noreloc-s3: - shard-apl: [DMESG-WARN][59] ([fdo#108566]) -> [INCOMPLETE][60] ([fdo#103927]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl5/igt@gem_softpin@noreloc-s3.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/shard-apl3/igt@gem_softpin@noreloc-s3.html [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060 [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (11 -> 10) ------------------------------ Missing (1): pig-snb-2600 Build changes ------------- * Linux: CI_DRM_6458 -> Patchwork_13622 CI_DRM_6458: fe4d1459b31768c40f907bb859f25197e1af2d07 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5093: 86dc48ede7c33bf69e15f84179d2f9e5b84c179b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13622: edc08ee6d32bca5ba5976780de3119ff94822617 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13622/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2019-07-19 12:13 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-07-11 10:32 [PATCH v2 0/5] drm/edid: Add new modes from CTA-861-G Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 1/5] drm/edid: Add CTA-861-G modes with VIC < 128 Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 2/5] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala 2019-07-19 8:45 ` Sharma, Shashank 2019-07-19 11:57 ` Ville Syrjälä 2019-07-19 12:13 ` Ville Syrjälä 2019-07-11 10:32 ` [PATCH v2 3/5] drm/edid: Add CTA-861-G modes with VIC >= 193 Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 4/5] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala 2019-07-11 10:32 ` [PATCH v2 5/5] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala 2019-07-11 14:42 ` Ville Syrjälä 2019-07-11 12:49 ` ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G Patchwork 2019-07-11 16:25 ` ✓ Fi.CI.BAT: success " Patchwork 2019-07-12 14:36 ` ✓ Fi.CI.IGT: " Patchwork
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