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From: "Woods, Brian" <Brian.Woods@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	"Woods,  Brian" <Brian.Woods@amd.com>,
	"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [Xen-devel] [PATCH v3 07/14] AMD/IOMMU: pass IOMMU to {get, free, update}_intremap_entry()
Date: Fri, 19 Jul 2019 18:32:17 +0000	[thread overview]
Message-ID: <20190719183214.GF4496@amd.com> (raw)
In-Reply-To: <fc2933cf-c456-5a61-c982-995012081d78@suse.com>

On Tue, Jul 16, 2019 at 04:37:51PM +0000, Jan Beulich wrote:
> The functions will want to know IOMMU properties (specifically the IRTE
> size) subsequently.
> 
> Rather than introducing a second error path bogusly returning -E... from
> amd_iommu_read_ioapic_from_ire(), also change the existing one to follow
> VT-d in returning the raw (untranslated) IO-APIC RTE.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Brian Woods <brian.woods@amd.com>

> ---
> v3: New.
> 
> --- a/xen/drivers/passthrough/amd/iommu_intr.c
> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
> @@ -123,11 +123,11 @@ static unsigned int alloc_intremap_entry
>       return slot;
>   }
>   
> -static union irte_ptr get_intremap_entry(unsigned int seg, unsigned int bdf,
> -                                         unsigned int index)
> +static union irte_ptr get_intremap_entry(const struct amd_iommu *iommu,
> +                                         unsigned int bdf, unsigned int index)
>   {
>       union irte_ptr table = {
> -        .ptr = get_ivrs_mappings(seg)[bdf].intremap_table
> +        .ptr = get_ivrs_mappings(iommu->seg)[bdf].intremap_table
>       };
>   
>       ASSERT(table.ptr && (index < INTREMAP_ENTRIES));
> @@ -137,18 +137,19 @@ static union irte_ptr get_intremap_entry
>       return table;
>   }
>   
> -static void free_intremap_entry(unsigned int seg, unsigned int bdf,
> -                                unsigned int index)
> +static void free_intremap_entry(const struct amd_iommu *iommu,
> +                                unsigned int bdf, unsigned int index)
>   {
> -    union irte_ptr entry = get_intremap_entry(seg, bdf, index);
> +    union irte_ptr entry = get_intremap_entry(iommu, bdf, index);
>   
>       ACCESS_ONCE(entry.ptr32->raw[0]) = 0;
>   
> -    __clear_bit(index, get_ivrs_mappings(seg)[bdf].intremap_inuse);
> +    __clear_bit(index, get_ivrs_mappings(iommu->seg)[bdf].intremap_inuse);
>   }
>   
> -static void update_intremap_entry(union irte_ptr entry, unsigned int vector,
> -                                  unsigned int int_type,
> +static void update_intremap_entry(const struct amd_iommu *iommu,
> +                                  union irte_ptr entry,
> +                                  unsigned int vector, unsigned int int_type,
>                                     unsigned int dest_mode, unsigned int dest)
>   {
>       struct irte_basic basic = {
> @@ -212,7 +213,7 @@ static int update_intremap_entry_from_io
>           lo_update = 1;
>       }
>   
> -    entry = get_intremap_entry(iommu->seg, req_id, offset);
> +    entry = get_intremap_entry(iommu, req_id, offset);
>       if ( !lo_update )
>       {
>           /*
> @@ -223,7 +224,7 @@ static int update_intremap_entry_from_io
>           vector = entry.ptr32->basic.vector;
>           delivery_mode = entry.ptr32->basic.int_type;
>       }
> -    update_intremap_entry(entry, vector, delivery_mode, dest_mode, dest);
> +    update_intremap_entry(iommu, entry, vector, delivery_mode, dest_mode, dest);
>   
>       spin_unlock_irqrestore(lock, flags);
>   
> @@ -288,8 +289,8 @@ int __init amd_iommu_setup_ioapic_remapp
>               spin_lock_irqsave(lock, flags);
>               offset = alloc_intremap_entry(seg, req_id, 1);
>               BUG_ON(offset >= INTREMAP_ENTRIES);
> -            entry = get_intremap_entry(iommu->seg, req_id, offset);
> -            update_intremap_entry(entry, vector,
> +            entry = get_intremap_entry(iommu, req_id, offset);
> +            update_intremap_entry(iommu, entry, vector,
>                                     delivery_mode, dest_mode, dest);
>               spin_unlock_irqrestore(lock, flags);
>   
> @@ -413,7 +414,7 @@ unsigned int amd_iommu_read_ioapic_from_
>   
>       idx = ioapic_id_to_index(IO_APIC_ID(apic));
>       if ( idx == MAX_IO_APICS )
> -        return -EINVAL;
> +        return val;
>   
>       offset = ioapic_sbdf[idx].pin_2_idx[pin];
>   
> @@ -422,9 +423,13 @@ unsigned int amd_iommu_read_ioapic_from_
>           u16 bdf = ioapic_sbdf[idx].bdf;
>           u16 seg = ioapic_sbdf[idx].seg;
>           u16 req_id = get_intremap_requestor_id(seg, bdf);
> -        union irte_ptr entry = get_intremap_entry(seg, req_id, offset);
> +        const struct amd_iommu *iommu = find_iommu_for_device(seg, bdf);
> +        union irte_ptr entry;
>   
> +        if ( !iommu )
> +            return val;
>           ASSERT(offset == (val & (INTREMAP_ENTRIES - 1)));
> +        entry = get_intremap_entry(iommu, req_id, offset);
>           val &= ~(INTREMAP_ENTRIES - 1);
>           val |= MASK_INSR(entry.ptr32->basic.int_type,
>                            IO_APIC_REDIR_DELIV_MODE_MASK);
> @@ -454,7 +459,7 @@ static int update_intremap_entry_from_ms
>           lock = get_intremap_lock(iommu->seg, req_id);
>           spin_lock_irqsave(lock, flags);
>           for ( i = 0; i < nr; ++i )
> -            free_intremap_entry(iommu->seg, req_id, *remap_index + i);
> +            free_intremap_entry(iommu, req_id, *remap_index + i);
>           spin_unlock_irqrestore(lock, flags);
>           goto done;
>       }
> @@ -479,8 +484,8 @@ static int update_intremap_entry_from_ms
>           *remap_index = offset;
>       }
>   
> -    entry = get_intremap_entry(iommu->seg, req_id, offset);
> -    update_intremap_entry(entry, vector, delivery_mode, dest_mode, dest);
> +    entry = get_intremap_entry(iommu, req_id, offset);
> +    update_intremap_entry(iommu, entry, vector, delivery_mode, dest_mode, dest);
>       spin_unlock_irqrestore(lock, flags);
>   
>       *data = (msg->data & ~(INTREMAP_ENTRIES - 1)) | offset;
> @@ -594,12 +599,13 @@ void amd_iommu_read_msi_from_ire(
>       const struct pci_dev *pdev = msi_desc->dev;
>       u16 bdf = pdev ? PCI_BDF2(pdev->bus, pdev->devfn) : hpet_sbdf.bdf;
>       u16 seg = pdev ? pdev->seg : hpet_sbdf.seg;
> +    const struct amd_iommu *iommu = _find_iommu_for_device(seg, bdf);
>       union irte_ptr entry;
>   
> -    if ( IS_ERR_OR_NULL(_find_iommu_for_device(seg, bdf)) )
> +    if ( IS_ERR_OR_NULL(iommu) )
>           return;
>   
> -    entry = get_intremap_entry(seg, get_dma_requestor_id(seg, bdf), offset);
> +    entry = get_intremap_entry(iommu, get_dma_requestor_id(seg, bdf), offset);
>   
>       if ( msi_desc->msi_attrib.type == PCI_CAP_ID_MSI )
>       {
> 

-- 
Brian Woods

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  parent reply	other threads:[~2019-07-19 18:32 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-16 16:30 [Xen-devel] [PATCH v3 00/14] x86: AMD x2APIC support Jan Beulich
2019-07-16 16:35 ` [Xen-devel] [PATCH v3 01/14] AMD/IOMMU: free more memory when cleaning up after error Jan Beulich
2019-07-19 15:02   ` Andrew Cooper
2019-07-19 18:22   ` Woods, Brian
2019-07-16 16:35 ` [Xen-devel] [PATCH v3 02/14] AMD/IOMMU: use bit field for extended feature register Jan Beulich
2019-07-17  6:19   ` Jan Beulich
2019-07-19 16:23   ` Andrew Cooper
2019-07-19 16:27     ` Jan Beulich
2019-07-16 16:36 ` [Xen-devel] [PATCH v3 03/14] AMD/IOMMU: use bit field for control register Jan Beulich
2019-07-19 18:23   ` Woods, Brian
2019-07-22  8:55     ` Jan Beulich
2019-07-16 16:36 ` [Xen-devel] [PATCH v3 04/14] AMD/IOMMU: use bit field for IRTE Jan Beulich
2019-07-19 15:56   ` Andrew Cooper
2019-07-19 16:16     ` Jan Beulich
2019-07-19 18:44       ` Andrew Cooper
2019-07-22 12:50         ` Jan Beulich
2019-07-19 18:24   ` Woods, Brian
2019-07-16 16:37 ` [Xen-devel] [PATCH v3 05/14] AMD/IOMMU: pass IOMMU to iterate_ivrs_entries() callback Jan Beulich
2019-07-19 16:32   ` Andrew Cooper
2019-07-19 18:26   ` Woods, Brian
2019-07-16 16:37 ` [Xen-devel] [PATCH v3 06/14] AMD/IOMMU: pass IOMMU to amd_iommu_alloc_intremap_table() Jan Beulich
2019-07-19 16:34   ` Andrew Cooper
2019-07-19 18:27   ` Woods, Brian
2019-07-16 16:37 ` [Xen-devel] [PATCH v3 07/14] AMD/IOMMU: pass IOMMU to {get, free, update}_intremap_entry() Jan Beulich
2019-07-19 16:47   ` Andrew Cooper
2019-07-19 18:32   ` Woods, Brian [this message]
2019-07-16 16:38 ` [Xen-devel] [PATCH v3 08/14] AMD/IOMMU: introduce 128-bit IRTE non-guest-APIC IRTE format Jan Beulich
2019-07-19 17:27   ` Andrew Cooper
2019-07-22  8:34     ` Jan Beulich
2019-07-22 13:36       ` Andrew Cooper
2019-07-22 15:01         ` Jan Beulich
2019-07-22 15:43           ` Andrew Cooper
2019-07-23  8:13             ` Jan Beulich
2019-07-23  8:19               ` Jan Beulich
2019-07-16 16:39 ` [Xen-devel] [PATCH v3 09/14] AMD/IOMMU: split amd_iommu_init_one() Jan Beulich
2019-07-19 18:36   ` Woods, Brian
2019-07-16 16:39 ` [Xen-devel] [PATCH v3 10/14] AMD/IOMMU: allow enabling with IRQ not yet set up Jan Beulich
2019-07-19 18:38   ` Woods, Brian
2019-07-16 16:39 ` [Xen-devel] [PATCH v3 11/14] AMD/IOMMU: adjust setup of internal interrupt for x2APIC mode Jan Beulich
2019-07-19 17:31   ` Andrew Cooper
2019-07-22  8:43     ` Jan Beulich
2019-07-22 13:45       ` Andrew Cooper
2019-07-22 15:22         ` Jan Beulich
2019-07-19 18:39   ` Woods, Brian
2019-07-16 16:40 ` [Xen-devel] [PATCH v3 12/14] AMD/IOMMU: enable x2APIC mode when available Jan Beulich
2019-07-19 17:38   ` Andrew Cooper
2019-07-19 18:41   ` Woods, Brian
2019-07-16 16:40 ` [Xen-devel] [PATCH RFC v3 13/14] AMD/IOMMU: correct IRTE updating Jan Beulich
2019-07-19 17:44   ` Andrew Cooper
2019-07-16 16:41 ` [Xen-devel] [PATCH v3 14/14] AMD/IOMMU: process softirqs while dumping IRTs Jan Beulich
2019-07-19 17:55   ` Andrew Cooper
2019-07-22  8:49     ` Jan Beulich
2019-07-22 12:17       ` Andrew Cooper
2019-07-19 18:43   ` Woods, Brian

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