From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD5BBC433FF for ; Thu, 1 Aug 2019 08:12:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 79C5620665 for ; Thu, 1 Aug 2019 08:12:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="fLfVSCrL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 79C5620665 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wfxqLAeMYssbYSRNq3q+ZZ44suu7xG8d342kldwtWTw=; b=fLfVSCrLXzxOzz Vvl4GVPL0fTgSwpE5dlAtKfJY92cn2g92rTTsqIRY8oFYKSJe5Jl9lMtogQTbUsD+GPgZS7JFzxp+ 4k5APISuZoNEQ6khjauYOicDky5KcHCJEK5k1GZYk6Sk5sF0vcbFBgfRHuYJ+jJ0A8/e12ulTW+sM 4w6EOLc8KSI/oGkY2Yfw12GkxAYhV/n5cvqp78m3lzGVbrbGs9YuQHMmqEiQkrJ3yFNXc4xAZg7ga 6OHeTikNUTauhX73g7B9x4ouBBPUtJ5VGcwprk+G5m0a6OZtEryz8ue0jviSxU6C8gqeOwBL03Z1V O0hou61VDclv0qz0KmvQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1ht6CR-0002IO-Vq; Thu, 01 Aug 2019 08:12:35 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1ht6CP-0002I3-Km for linux-arm-kernel@lists.infradead.org; Thu, 01 Aug 2019 08:12:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A05AC337; Thu, 1 Aug 2019 01:12:32 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 212953F694; Thu, 1 Aug 2019 01:12:31 -0700 (PDT) Date: Thu, 1 Aug 2019 09:12:30 +0100 From: Andrew Murray To: Boqun Feng Subject: Re: [PATCH v2 3/5] arm64: atomics: avoid out-of-line ll/sc atomics Message-ID: <20190801081230.GL56241@e119886-lin.cambridge.arm.com> References: <20190731161256.22210-1-andrew.murray@arm.com> <20190731161256.22210-4-andrew.murray@arm.com> <20190801031004.GD26905@tardis> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190801031004.GD26905@tardis> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190801_011233_772855_5467A079 X-CRM114-Status: GOOD ( 11.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Peter Zijlstra , Catalin Marinas , Will Deacon , Ard.Biesheuvel@arm.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 01, 2019 at 11:10:04AM +0800, Boqun Feng wrote: > Hi Andrew, > > On Wed, Jul 31, 2019 at 05:12:54PM +0100, Andrew Murray wrote: > [...] > > + > > +#define __lse_ll_sc_body(op, ...) \ > > +({ \ > > + system_uses_lse_atomics() ? \ > > + __lse_##op(__VA_ARGS__) : \ > > + __ll_sc_##op(__VA_ARGS__); \ > > +}) > > + > > +#define ATOMIC_OP(op) \ > > +static inline void arch_##op(int i, atomic_t *v) \ > > +{ \ > > + __lse_ll_sc_body(op, i, v); \ > > +} > > + > > +ATOMIC_OP(atomic_andnot) > > +ATOMIC_OP(atomic_or) > > +ATOMIC_OP(atomic_xor) > > +ATOMIC_OP(atomic_add) > > +ATOMIC_OP(atomic_and) > > +ATOMIC_OP(atomic_sub) > > + > > + > > +#define ATOMIC_FETCH_OP(name, op) \ > > +static inline int arch_##op##name(int i, atomic_t *v) \ > > +{ \ > > + return __lse_ll_sc_body(op, i, v); \ > > Color me blind if I'm wrong, but should't this be: > > return __lse_ll_sc_body(op##name, i, v); \ > > ? Otherwise all variants will use the fully-ordered implementation. Yes you're correct, thanks for spotting this (and below)! Thanks, Andrew Murray > > > +} > > + > > +#define ATOMIC_FETCH_OPS(op) \ > > + ATOMIC_FETCH_OP(_relaxed, op) \ > > + ATOMIC_FETCH_OP(_acquire, op) \ > > + ATOMIC_FETCH_OP(_release, op) \ > > + ATOMIC_FETCH_OP( , op) > > + > > +ATOMIC_FETCH_OPS(atomic_fetch_andnot) > > +ATOMIC_FETCH_OPS(atomic_fetch_or) > > +ATOMIC_FETCH_OPS(atomic_fetch_xor) > > +ATOMIC_FETCH_OPS(atomic_fetch_add) > > +ATOMIC_FETCH_OPS(atomic_fetch_and) > > +ATOMIC_FETCH_OPS(atomic_fetch_sub) > > +ATOMIC_FETCH_OPS(atomic_add_return) > > +ATOMIC_FETCH_OPS(atomic_sub_return) > > + > > + > > +#define ATOMIC64_OP(op) \ > > +static inline void arch_##op(long i, atomic64_t *v) \ > > +{ \ > > + __lse_ll_sc_body(op, i, v); \ > > +} > > + > > +ATOMIC64_OP(atomic64_andnot) > > +ATOMIC64_OP(atomic64_or) > > +ATOMIC64_OP(atomic64_xor) > > +ATOMIC64_OP(atomic64_add) > > +ATOMIC64_OP(atomic64_and) > > +ATOMIC64_OP(atomic64_sub) > > + > > + > > +#define ATOMIC64_FETCH_OP(name, op) \ > > +static inline long arch_##op##name(long i, atomic64_t *v) \ > > +{ \ > > + return __lse_ll_sc_body(op, i, v); \ > > Ditto. > > Regards, > Boqun > > > +} > > + > > +#define ATOMIC64_FETCH_OPS(op) \ > > + ATOMIC64_FETCH_OP(_relaxed, op) \ > > + ATOMIC64_FETCH_OP(_acquire, op) \ > > + ATOMIC64_FETCH_OP(_release, op) \ > > + ATOMIC64_FETCH_OP( , op) > > + > > +ATOMIC64_FETCH_OPS(atomic64_fetch_andnot) > > +ATOMIC64_FETCH_OPS(atomic64_fetch_or) > > +ATOMIC64_FETCH_OPS(atomic64_fetch_xor) > > +ATOMIC64_FETCH_OPS(atomic64_fetch_add) > > +ATOMIC64_FETCH_OPS(atomic64_fetch_and) > > +ATOMIC64_FETCH_OPS(atomic64_fetch_sub) > > +ATOMIC64_FETCH_OPS(atomic64_add_return) > > +ATOMIC64_FETCH_OPS(atomic64_sub_return) > > + > > + > [...] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel