[PATCH v3] nvme-pci: Support shared tags across queues for Apple 2018 controllers

[keith.busch@intel.com (Keith Busch)]

On Mon, Aug 05, 2019@04:49:23PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2019-07-30@13:28 -0700, Benjamin Herrenschmidt wrote:
> > > One problem is that we've an nvme parameter, io_queue_depth, that a user
> > > could set to something less than 32, and then you won't be able to do
> > > any IO. I'd recommend enforce the admin queue to QD1 for this device so
> > > that you have more potential IO tags.
> > 
> > So I had a look and it's not that trivial. I would have to change
> > a few things that use constants for the admin queue depth, such as
> > the AEN tag etc...
> > 
> > For such a special case, I am tempted instead to do the much simpler:
> > 
> >         if (dev->ctrl.quirks & NVME_QUIRK_SHARED_TAGS) {
> >                 if (dev->q_depth < (NVME_AQ_DEPTH + 2))
> >                         dev->q_depth = NVME_AQ_DEPTH + 2;
> >         }
> > 
> > In nvme_pci_enable() next to the existing q_depth hackery for other
> > controllers.
> > 
> > Thoughts ?
> 
> Ping ? I had another look today and I don't feel like mucking around
> with all the AQ size logic, AEN magic tag etc... just for that sake of
> that Apple gunk. I'm happy to have it give up IO tags, it doesn't seem
> to make much of a difference in practice anyway.
> 
> But if you feel strongly about it, then I'll implement the "proper" way
> sometimes this week, adding a way to shrink the AQ down to something
> like 3 (one admin request, one async event (AEN), and the empty slot)
> by making a bunch of the constants involved variables instead.

I don't feel too strongly about it. I think your patch is fine, so

Acked-by: Keith Busch <keith.busch at intel.com>