From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 925E5C32754 for ; Thu, 8 Aug 2019 19:06:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 643EE2189F for ; Thu, 8 Aug 2019 19:06:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1565291213; bh=gkp+KkTEEk8Rf4P2bv7ilyd8JRP+UASS4zS7j6dMfRw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=qVXpgANrDbIHWzigHJ6F994ULBbLoceFv8qXz3BO6d2CAylZkAE5J9ojIjEFVSAIh hY0fG+3L2lI0gsPEiZUtYHr/62qLWikYBvCzLFYQy+zvl2aVr02kB05YWIAnfcCb9U V2NdCfLZyUhvyQOxZWUJgplRbT7lODtIzDzFDB6U= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404536AbfHHTGw (ORCPT ); Thu, 8 Aug 2019 15:06:52 -0400 Received: from mail.kernel.org ([198.145.29.99]:40348 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404508AbfHHTGq (ORCPT ); Thu, 8 Aug 2019 15:06:46 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BE5F921880; Thu, 8 Aug 2019 19:06:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1565291205; bh=gkp+KkTEEk8Rf4P2bv7ilyd8JRP+UASS4zS7j6dMfRw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S0mvRCoxVUezwgA/DCqk/b8RaXdJsVOIE3U99mS/peK6D+qIQ4qpTggXKwuBJLr8H b0YMg0Bv7dLV2ON+HTumaq+Z8e4ecGKYTvJGjIB6GIw4sRIBAACd6mXJz75OM1Xolt d02Ux/5EDR/uY0XYkExjZ6EOAwwK7dbfHHdWBNGE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= , Russell King , "David S. Miller" Subject: [PATCH 5.2 26/56] net: phylink: Fix flow control for fixed-link Date: Thu, 8 Aug 2019 21:04:52 +0200 Message-Id: <20190808190453.973402509@linuxfoundation.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190808190452.867062037@linuxfoundation.org> References: <20190808190452.867062037@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "René van Dorst" [ Upstream commit 8aace4f3eba2a3ceb431e18683ea0e1ecbade5cd ] In phylink_parse_fixedlink() the pl->link_config.advertising bits are AND with pl->supported, pl->supported is zeroed and only the speed/duplex modes and MII bits are set. So pl->link_config.advertising always loses the flow control/pause bits. By setting Pause and Asym_Pause bits in pl->supported, the flow control work again when devicetree "pause" is set in fixes-link node and the MAC advertise that is supports pause. Results with this patch. Legend: - DT = 'Pause' is set in the fixed-link in devicetree. - validate() = ‘Yes’ means phylink_set(mask, Pause) is set in the validate(). - flow = results reported my link is Up line. +-----+------------+-------+ | DT | validate() | flow | +-----+------------+-------+ | Yes | Yes | rx/tx | | No | Yes | off | | Yes | No | off | +-----+------------+-------+ Fixes: 9525ae83959b ("phylink: add phylink infrastructure") Signed-off-by: René van Dorst Acked-by: Russell King Signed-off-by: David S. Miller Signed-off-by: Greg Kroah-Hartman --- drivers/net/phy/phylink.c | 2 ++ 1 file changed, 2 insertions(+) --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -195,6 +195,8 @@ static int phylink_parse_fixedlink(struc pl->supported, true); linkmode_zero(pl->supported); phylink_set(pl->supported, MII); + phylink_set(pl->supported, Pause); + phylink_set(pl->supported, Asym_Pause); if (s) { __set_bit(s->bit, pl->supported); } else {