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header.i=@lists.infradead.org header.b="C18shYwn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 974C2218A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OLbfhTYJHFQyqxThyh6Ncf0rWnKv00gkYGIxXKDWuEA=; b=C18shYwnTrdhRU 2m5KRCfA5jNy0tr3yD6bVG4FU3nHB5XO5CTmxLZ8SajIm+v2BRFd0Rvx9jTy5ZkG7H1ec6WRzK64r TGjVEonbH0OU3Bku652Y2tAywV4RMtQsFSUhMns/ZpxEEBDmOPIkcyA6fz+WOKz04x6hxrFfOterW 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Subject: Re: [PATCH 12/16] mtd: rawnand: remove w90x900 driver Message-ID: <20190810102121.07bf8c37@collabora.com> In-Reply-To: <20190809202749.742267-13-arnd@arndb.de> References: <20190809202749.742267-1-arnd@arndb.de> <20190809202749.742267-13-arnd@arndb.de> Organization: Collabora X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190810_012126_898026_7E19AFDA X-CRM114-Status: GOOD ( 22.37 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vignesh Raghavendra , Richard Weinberger , linux-kernel@vger.kernel.org, Marek Vasut , soc@kernel.org, linux-mtd@lists.infradead.org, Miquel Raynal , Brian Norris , David Woodhouse Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org T24gRnJpLCAgOSBBdWcgMjAxOSAyMjoyNzo0MCArMDIwMApBcm5kIEJlcmdtYW5uIDxhcm5kQGFy bmRiLmRlPiB3cm90ZToKCj4gVGhlIEFSTSB3OTB4OTAwIHBsYXRmb3JtIGlzIGdldHRpbmcgcmVt b3ZlZCwgc28gdGhpcyBkcml2ZXIgaXMgb2Jzb2xldGUuCj4gCj4gU2lnbmVkLW9mZi1ieTogQXJu ZCBCZXJnbWFubiA8YXJuZEBhcm5kYi5kZT4KCk9uZSBsZXNzIGRyaXZlciB0byBjb252ZXJ0IHRv IC0+ZXhlY19vcCgpLCBZYXkhIAoKUmV2aWV3ZWQtYnk6IEJvcmlzIEJyZXppbGxvbiA8Ym9yaXMu YnJlemlsbG9uQGNvbGxhYm9yYS5jb20+Cgo+IC0tLQo+ICBkcml2ZXJzL210ZC9uYW5kL3Jhdy9L Y29uZmlnICAgICAgIHwgICA4IC0KPiAgZHJpdmVycy9tdGQvbmFuZC9yYXcvTWFrZWZpbGUgICAg ICB8ICAgMSAtCj4gIGRyaXZlcnMvbXRkL25hbmQvcmF3L251YzkwMF9uYW5kLmMgfCAzMDQgLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0KPiAgMyBmaWxlcyBjaGFuZ2VkLCAzMTMgZGVsZXRp b25zKC0pCj4gIGRlbGV0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL210ZC9uYW5kL3Jhdy9udWM5MDBf bmFuZC5jCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvbXRkL25hbmQvcmF3L0tjb25maWcgYi9k cml2ZXJzL210ZC9uYW5kL3Jhdy9LY29uZmlnCj4gaW5kZXggNWE3MTFkOGJlYWNhLi4wZTVjNWUw MmVlNmYgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9tdGQvbmFuZC9yYXcvS2NvbmZpZwo+ICsrKyBi L2RyaXZlcnMvbXRkL25hbmQvcmF3L0tjb25maWcKPiBAQCAtMzUxLDE0ICszNTEsNiBAQCBjb25m aWcgTVREX05BTkRfU09DUkFURVMKPiAgCWhlbHAKPiAgCSAgRW5hYmxlcyBzdXBwb3J0IGZvciBO QU5EIEZsYXNoIGNoaXBzIHdpcmVkIG9udG8gU29jcmF0ZXMgYm9hcmQuCj4gIAo+IC1jb25maWcg TVREX05BTkRfTlVDOTAwCj4gLQl0cmlzdGF0ZSAiTnV2b3RvbiBOVUM5eHgvdzkwcDkxMCBOQU5E IGNvbnRyb2xsZXIiCj4gLQlkZXBlbmRzIG9uIEFSQ0hfVzkwWDkwMCB8fCBDT01QSUxFX1RFU1QK PiAtCWRlcGVuZHMgb24gSEFTX0lPTUVNCj4gLQloZWxwCj4gLQkgIFRoaXMgZW5hYmxlcyB0aGUg ZHJpdmVyIGZvciB0aGUgTkFORCBGbGFzaCBvbiBldmFsdWF0aW9uIGJvYXJkIGJhc2VkCj4gLQkg IG9uIHc5MHA5MTAgLyBOVUM5eHguCj4gLQo+ICBzb3VyY2UgImRyaXZlcnMvbXRkL25hbmQvcmF3 L2luZ2VuaWMvS2NvbmZpZyIKPiAgCj4gIGNvbmZpZyBNVERfTkFORF9GU01DCj4gZGlmZiAtLWdp dCBhL2RyaXZlcnMvbXRkL25hbmQvcmF3L01ha2VmaWxlIGIvZHJpdmVycy9tdGQvbmFuZC9yYXcv TWFrZWZpbGUKPiBpbmRleCBlZmFmNWNkMjVlZGMuLmQ3ZjZjMjM3ZTM3YyAxMDA2NDQKPiAtLS0g YS9kcml2ZXJzL210ZC9uYW5kL3Jhdy9NYWtlZmlsZQo+ICsrKyBiL2RyaXZlcnMvbXRkL25hbmQv cmF3L01ha2VmaWxlCj4gQEAgLTQxLDcgKzQxLDYgQEAgb2JqLSQoQ09ORklHX01URF9OQU5EX1NI X0ZMQ1RMKQkJKz0gc2hfZmxjdGwubwo+ICBvYmotJChDT05GSUdfTVREX05BTkRfTVhDKQkJKz0g bXhjX25hbmQubwo+ICBvYmotJChDT05GSUdfTVREX05BTkRfU09DUkFURVMpCQkrPSBzb2NyYXRl c19uYW5kLm8KPiAgb2JqLSQoQ09ORklHX01URF9OQU5EX1RYWDlOREZNQykJKz0gdHh4OW5kZm1j Lm8KPiAtb2JqLSQoQ09ORklHX01URF9OQU5EX05VQzkwMCkJCSs9IG51YzkwMF9uYW5kLm8KPiAg b2JqLSQoQ09ORklHX01URF9OQU5EX01QQzUxMjFfTkZDKQkrPSBtcGM1MTIxX25mYy5vCj4gIG9i ai0kKENPTkZJR19NVERfTkFORF9WRjYxMF9ORkMpCSs9IHZmNjEwX25mYy5vCj4gIG9iai0kKENP TkZJR19NVERfTkFORF9SSUNPSCkJCSs9IHI4NTIubwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL210 ZC9uYW5kL3Jhdy9udWM5MDBfbmFuZC5jIGIvZHJpdmVycy9tdGQvbmFuZC9yYXcvbnVjOTAwX25h bmQuYwo+IGRlbGV0ZWQgZmlsZSBtb2RlIDEwMDY0NAo+IGluZGV4IDEzYmY3YjI4OTRkMy4uMDAw MDAwMDAwMDAwCj4gLS0tIGEvZHJpdmVycy9tdGQvbmFuZC9yYXcvbnVjOTAwX25hbmQuYwo+ICsr KyAvZGV2L251bGwKPiBAQCAtMSwzMDQgKzAsMCBAQAo+IC0vLyBTUERYLUxpY2Vuc2UtSWRlbnRp ZmllcjogR1BMLTIuMC1vbmx5Cj4gLS8qCj4gLSAqIENvcHlyaWdodCDCqSAyMDA5IE51dm90b24g dGVjaG5vbG9neSBjb3Jwb3JhdGlvbi4KPiAtICoKPiAtICogV2FuIFpvbmdTaHVuIDxtY3Vvcy5j b21AZ21haWwuY29tPgo+IC0gKi8KPiAtCj4gLSNpbmNsdWRlIDxsaW51eC9zbGFiLmg+Cj4gLSNp bmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KPiAtI2luY2x1ZGUgPGxpbnV4L2ludGVycnVwdC5oPgo+ IC0jaW5jbHVkZSA8bGludXgvaW8uaD4KPiAtI2luY2x1ZGUgPGxpbnV4L3BsYXRmb3JtX2Rldmlj ZS5oPgo+IC0jaW5jbHVkZSA8bGludXgvZGVsYXkuaD4KPiAtI2luY2x1ZGUgPGxpbnV4L2Nsay5o Pgo+IC0jaW5jbHVkZSA8bGludXgvZXJyLmg+Cj4gLQo+IC0jaW5jbHVkZSA8bGludXgvbXRkL210 ZC5oPgo+IC0jaW5jbHVkZSA8bGludXgvbXRkL3Jhd25hbmQuaD4KPiAtI2luY2x1ZGUgPGxpbnV4 L210ZC9wYXJ0aXRpb25zLmg+Cj4gLQo+IC0jZGVmaW5lIFJFR19GTUlDU1IgICAJMHgwMAo+IC0j ZGVmaW5lIFJFR19TTUNTUiAgICAJMHhhMAo+IC0jZGVmaW5lIFJFR19TTUlTUiAgICAJMHhhYwo+ IC0jZGVmaW5lIFJFR19TTUNNRCAgICAJMHhiMAo+IC0jZGVmaW5lIFJFR19TTUFERFIgICAJMHhi NAo+IC0jZGVmaW5lIFJFR19TTURBVEEgICAJMHhiOAo+IC0KPiAtI2RlZmluZSBSRVNFVF9GTUkJ MHgwMQo+IC0jZGVmaW5lIE5BTkRfRU4JCTB4MDgKPiAtI2RlZmluZSBSRUFEWUJVU1kJKDB4MDEg PDwgMTgpCj4gLQo+IC0jZGVmaW5lIFNXUlNUCQkweDAxCj4gLSNkZWZpbmUgUFNJWkUJCSgweDAx IDw8IDMpCj4gLSNkZWZpbmUgRE1BUldFTgkJKDB4MDMgPDwgMSkKPiAtI2RlZmluZSBCVVNXSUQJ CSgweDAxIDw8IDQpCj4gLSNkZWZpbmUgRUNDNEVOCQkoMHgwMSA8PCA1KQo+IC0jZGVmaW5lIFdQ CQkoMHgwMSA8PCAyNCkKPiAtI2RlZmluZSBOQU5EQ1MJCSgweDAxIDw8IDI1KQo+IC0jZGVmaW5l IEVOREFERFIJCSgweDAxIDw8IDMxKQo+IC0KPiAtI2RlZmluZSByZWFkX2RhdGFfcmVnKGRldikJ CVwKPiAtCV9fcmF3X3JlYWRsKChkZXYpLT5yZWcgKyBSRUdfU01EQVRBKQo+IC0KPiAtI2RlZmlu ZSB3cml0ZV9kYXRhX3JlZyhkZXYsIHZhbCkJXAo+IC0JX19yYXdfd3JpdGVsKCh2YWwpLCAoZGV2 KS0+cmVnICsgUkVHX1NNREFUQSkKPiAtCj4gLSNkZWZpbmUgd3JpdGVfY21kX3JlZyhkZXYsIHZh bCkJCVwKPiAtCV9fcmF3X3dyaXRlbCgodmFsKSwgKGRldiktPnJlZyArIFJFR19TTUNNRCkKPiAt Cj4gLSNkZWZpbmUgd3JpdGVfYWRkcl9yZWcoZGV2LCB2YWwpCVwKPiAtCV9fcmF3X3dyaXRlbCgo dmFsKSwgKGRldiktPnJlZyArIFJFR19TTUFERFIpCj4gLQo+IC1zdHJ1Y3QgbnVjOTAwX25hbmQg ewo+IC0Jc3RydWN0IG5hbmRfY2hpcCBjaGlwOwo+IC0Jdm9pZCBfX2lvbWVtICpyZWc7Cj4gLQlz dHJ1Y3QgY2xrICpjbGs7Cj4gLQlzcGlubG9ja190IGxvY2s7Cj4gLX07Cj4gLQo+IC1zdGF0aWMg aW5saW5lIHN0cnVjdCBudWM5MDBfbmFuZCAqbXRkX3RvX251YzkwMChzdHJ1Y3QgbXRkX2luZm8g Km10ZCkKPiAtewo+IC0JcmV0dXJuIGNvbnRhaW5lcl9vZihtdGRfdG9fbmFuZChtdGQpLCBzdHJ1 Y3QgbnVjOTAwX25hbmQsIGNoaXApOwo+IC19Cj4gLQo+IC1zdGF0aWMgY29uc3Qgc3RydWN0IG10 ZF9wYXJ0aXRpb24gcGFydGl0aW9uc1tdID0gewo+IC0Jewo+IC0JIC5uYW1lID0gIk5BTkQgRlMg MCIsCj4gLQkgLm9mZnNldCA9IDAsCj4gLQkgLnNpemUgPSA4ICogMTAyNCAqIDEwMjQKPiAtCX0s Cj4gLQl7Cj4gLQkgLm5hbWUgPSAiTkFORCBGUyAxIiwKPiAtCSAub2Zmc2V0ID0gTVREUEFSVF9P RlNfQVBQRU5ELAo+IC0JIC5zaXplID0gTVREUEFSVF9TSVpfRlVMTAo+IC0JfQo+IC19Owo+IC0K PiAtc3RhdGljIHVuc2lnbmVkIGNoYXIgbnVjOTAwX25hbmRfcmVhZF9ieXRlKHN0cnVjdCBuYW5k X2NoaXAgKmNoaXApCj4gLXsKPiAtCXVuc2lnbmVkIGNoYXIgcmV0Owo+IC0Jc3RydWN0IG51Yzkw MF9uYW5kICpuYW5kID0gbXRkX3RvX251YzkwMChuYW5kX3RvX210ZChjaGlwKSk7Cj4gLQo+IC0J cmV0ID0gKHVuc2lnbmVkIGNoYXIpcmVhZF9kYXRhX3JlZyhuYW5kKTsKPiAtCj4gLQlyZXR1cm4g cmV0Owo+IC19Cj4gLQo+IC1zdGF0aWMgdm9pZCBudWM5MDBfbmFuZF9yZWFkX2J1ZihzdHJ1Y3Qg bmFuZF9jaGlwICpjaGlwLAo+IC0JCQkJIHVuc2lnbmVkIGNoYXIgKmJ1ZiwgaW50IGxlbikKPiAt ewo+IC0JaW50IGk7Cj4gLQlzdHJ1Y3QgbnVjOTAwX25hbmQgKm5hbmQgPSBtdGRfdG9fbnVjOTAw KG5hbmRfdG9fbXRkKGNoaXApKTsKPiAtCj4gLQlmb3IgKGkgPSAwOyBpIDwgbGVuOyBpKyspCj4g LQkJYnVmW2ldID0gKHVuc2lnbmVkIGNoYXIpcmVhZF9kYXRhX3JlZyhuYW5kKTsKPiAtfQo+IC0K PiAtc3RhdGljIHZvaWQgbnVjOTAwX25hbmRfd3JpdGVfYnVmKHN0cnVjdCBuYW5kX2NoaXAgKmNo aXAsCj4gLQkJCQkgIGNvbnN0IHVuc2lnbmVkIGNoYXIgKmJ1ZiwgaW50IGxlbikKPiAtewo+IC0J aW50IGk7Cj4gLQlzdHJ1Y3QgbnVjOTAwX25hbmQgKm5hbmQgPSBtdGRfdG9fbnVjOTAwKG5hbmRf dG9fbXRkKGNoaXApKTsKPiAtCj4gLQlmb3IgKGkgPSAwOyBpIDwgbGVuOyBpKyspCj4gLQkJd3Jp dGVfZGF0YV9yZWcobmFuZCwgYnVmW2ldKTsKPiAtfQo+IC0KPiAtc3RhdGljIGludCBudWM5MDBf Y2hlY2tfcmIoc3RydWN0IG51YzkwMF9uYW5kICpuYW5kKQo+IC17Cj4gLQl1bnNpZ25lZCBpbnQg dmFsOwo+IC0Jc3Bpbl9sb2NrKCZuYW5kLT5sb2NrKTsKPiAtCXZhbCA9IF9fcmF3X3JlYWRsKG5h bmQtPnJlZyArIFJFR19TTUlTUik7Cj4gLQl2YWwgJj0gUkVBRFlCVVNZOwo+IC0Jc3Bpbl91bmxv Y2soJm5hbmQtPmxvY2spOwo+IC0KPiAtCXJldHVybiB2YWw7Cj4gLX0KPiAtCj4gLXN0YXRpYyBp bnQgbnVjOTAwX25hbmRfZGV2cmVhZHkoc3RydWN0IG5hbmRfY2hpcCAqY2hpcCkKPiAtewo+IC0J c3RydWN0IG51YzkwMF9uYW5kICpuYW5kID0gbXRkX3RvX251YzkwMChuYW5kX3RvX210ZChjaGlw KSk7Cj4gLQlpbnQgcmVhZHk7Cj4gLQo+IC0JcmVhZHkgPSAobnVjOTAwX2NoZWNrX3JiKG5hbmQp KSA/IDEgOiAwOwo+IC0JcmV0dXJuIHJlYWR5Owo+IC19Cj4gLQo+IC1zdGF0aWMgdm9pZCBudWM5 MDBfbmFuZF9jb21tYW5kX2xwKHN0cnVjdCBuYW5kX2NoaXAgKmNoaXAsCj4gLQkJCQkgICB1bnNp Z25lZCBpbnQgY29tbWFuZCwKPiAtCQkJCSAgIGludCBjb2x1bW4sIGludCBwYWdlX2FkZHIpCj4g LXsKPiAtCXN0cnVjdCBtdGRfaW5mbyAqbXRkID0gbmFuZF90b19tdGQoY2hpcCk7Cj4gLQlzdHJ1 Y3QgbnVjOTAwX25hbmQgKm5hbmQgPSBtdGRfdG9fbnVjOTAwKG10ZCk7Cj4gLQo+IC0JaWYgKGNv bW1hbmQgPT0gTkFORF9DTURfUkVBRE9PQikgewo+IC0JCWNvbHVtbiArPSBtdGQtPndyaXRlc2l6 ZTsKPiAtCQljb21tYW5kID0gTkFORF9DTURfUkVBRDA7Cj4gLQl9Cj4gLQo+IC0Jd3JpdGVfY21k X3JlZyhuYW5kLCBjb21tYW5kICYgMHhmZik7Cj4gLQo+IC0JaWYgKGNvbHVtbiAhPSAtMSB8fCBw YWdlX2FkZHIgIT0gLTEpIHsKPiAtCj4gLQkJaWYgKGNvbHVtbiAhPSAtMSkgewo+IC0JCQlpZiAo Y2hpcC0+b3B0aW9ucyAmIE5BTkRfQlVTV0lEVEhfMTYgJiYKPiAtCQkJCQkhbmFuZF9vcGNvZGVf OGJpdHMoY29tbWFuZCkpCj4gLQkJCQljb2x1bW4gPj49IDE7Cj4gLQkJCXdyaXRlX2FkZHJfcmVn KG5hbmQsIGNvbHVtbik7Cj4gLQkJCXdyaXRlX2FkZHJfcmVnKG5hbmQsIGNvbHVtbiA+PiA4IHwg RU5EQUREUik7Cj4gLQkJfQo+IC0JCWlmIChwYWdlX2FkZHIgIT0gLTEpIHsKPiAtCQkJd3JpdGVf YWRkcl9yZWcobmFuZCwgcGFnZV9hZGRyKTsKPiAtCj4gLQkJCWlmIChjaGlwLT5vcHRpb25zICYg TkFORF9ST1dfQUREUl8zKSB7Cj4gLQkJCQl3cml0ZV9hZGRyX3JlZyhuYW5kLCBwYWdlX2FkZHIg Pj4gOCk7Cj4gLQkJCQl3cml0ZV9hZGRyX3JlZyhuYW5kLCBwYWdlX2FkZHIgPj4gMTYgfCBFTkRB RERSKTsKPiAtCQkJfSBlbHNlIHsKPiAtCQkJCXdyaXRlX2FkZHJfcmVnKG5hbmQsIHBhZ2VfYWRk ciA+PiA4IHwgRU5EQUREUik7Cj4gLQkJCX0KPiAtCQl9Cj4gLQl9Cj4gLQo+IC0Jc3dpdGNoIChj b21tYW5kKSB7Cj4gLQljYXNlIE5BTkRfQ01EX0NBQ0hFRFBST0c6Cj4gLQljYXNlIE5BTkRfQ01E X1BBR0VQUk9HOgo+IC0JY2FzZSBOQU5EX0NNRF9FUkFTRTE6Cj4gLQljYXNlIE5BTkRfQ01EX0VS QVNFMjoKPiAtCWNhc2UgTkFORF9DTURfU0VRSU46Cj4gLQljYXNlIE5BTkRfQ01EX1JORElOOgo+ IC0JY2FzZSBOQU5EX0NNRF9TVEFUVVM6Cj4gLQkJcmV0dXJuOwo+IC0KPiAtCWNhc2UgTkFORF9D TURfUkVTRVQ6Cj4gLQkJaWYgKGNoaXAtPmxlZ2FjeS5kZXZfcmVhZHkpCj4gLQkJCWJyZWFrOwo+ IC0JCXVkZWxheShjaGlwLT5sZWdhY3kuY2hpcF9kZWxheSk7Cj4gLQo+IC0JCXdyaXRlX2NtZF9y ZWcobmFuZCwgTkFORF9DTURfU1RBVFVTKTsKPiAtCQl3cml0ZV9jbWRfcmVnKG5hbmQsIGNvbW1h bmQpOwo+IC0KPiAtCQl3aGlsZSAoIW51YzkwMF9jaGVja19yYihuYW5kKSkKPiAtCQkJOwo+IC0K PiAtCQlyZXR1cm47Cj4gLQo+IC0JY2FzZSBOQU5EX0NNRF9STkRPVVQ6Cj4gLQkJd3JpdGVfY21k X3JlZyhuYW5kLCBOQU5EX0NNRF9STkRPVVRTVEFSVCk7Cj4gLQkJcmV0dXJuOwo+IC0KPiAtCWNh c2UgTkFORF9DTURfUkVBRDA6Cj4gLQkJd3JpdGVfY21kX3JlZyhuYW5kLCBOQU5EX0NNRF9SRUFE U1RBUlQpOwo+IC0JCS8qIGZhbGwgdGhyb3VnaCAqLwo+IC0KPiAtCWRlZmF1bHQ6Cj4gLQo+IC0J CWlmICghY2hpcC0+bGVnYWN5LmRldl9yZWFkeSkgewo+IC0JCQl1ZGVsYXkoY2hpcC0+bGVnYWN5 LmNoaXBfZGVsYXkpOwo+IC0JCQlyZXR1cm47Cj4gLQkJfQo+IC0JfQo+IC0KPiAtCS8qIEFwcGx5 IHRoaXMgc2hvcnQgZGVsYXkgYWx3YXlzIHRvIGVuc3VyZSB0aGF0IHdlIGRvIHdhaXQgdFdCIGlu Cj4gLQkgKiBhbnkgY2FzZSBvbiBhbnkgbWFjaGluZS4gKi8KPiAtCW5kZWxheSgxMDApOwo+IC0K PiAtCXdoaWxlICghY2hpcC0+bGVnYWN5LmRldl9yZWFkeShjaGlwKSkKPiAtCQk7Cj4gLX0KPiAt Cj4gLQo+IC1zdGF0aWMgdm9pZCBudWM5MDBfbmFuZF9lbmFibGUoc3RydWN0IG51YzkwMF9uYW5k ICpuYW5kKQo+IC17Cj4gLQl1bnNpZ25lZCBpbnQgdmFsOwo+IC0Jc3Bpbl9sb2NrKCZuYW5kLT5s b2NrKTsKPiAtCV9fcmF3X3dyaXRlbChSRVNFVF9GTUksIChuYW5kLT5yZWcgKyBSRUdfRk1JQ1NS KSk7Cj4gLQo+IC0JdmFsID0gX19yYXdfcmVhZGwobmFuZC0+cmVnICsgUkVHX0ZNSUNTUik7Cj4g LQo+IC0JaWYgKCEodmFsICYgTkFORF9FTikpCj4gLQkJX19yYXdfd3JpdGVsKHZhbCB8IE5BTkRf RU4sIG5hbmQtPnJlZyArIFJFR19GTUlDU1IpOwo+IC0KPiAtCXZhbCA9IF9fcmF3X3JlYWRsKG5h bmQtPnJlZyArIFJFR19TTUNTUik7Cj4gLQo+IC0JdmFsICY9IH4oU1dSU1R8UFNJWkV8RE1BUldF TnxCVVNXSUR8RUNDNEVOfE5BTkRDUyk7Cj4gLQl2YWwgfD0gV1A7Cj4gLQo+IC0JX19yYXdfd3Jp dGVsKHZhbCwgbmFuZC0+cmVnICsgUkVHX1NNQ1NSKTsKPiAtCj4gLQlzcGluX3VubG9jaygmbmFu ZC0+bG9jayk7Cj4gLX0KPiAtCj4gLXN0YXRpYyBpbnQgbnVjOTAwX25hbmRfcHJvYmUoc3RydWN0 IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAtewo+IC0Jc3RydWN0IG51YzkwMF9uYW5kICpudWM5 MDBfbmFuZDsKPiAtCXN0cnVjdCBuYW5kX2NoaXAgKmNoaXA7Cj4gLQlzdHJ1Y3QgbXRkX2luZm8g Km10ZDsKPiAtCXN0cnVjdCByZXNvdXJjZSAqcmVzOwo+IC0KPiAtCW51YzkwMF9uYW5kID0gZGV2 bV9remFsbG9jKCZwZGV2LT5kZXYsIHNpemVvZihzdHJ1Y3QgbnVjOTAwX25hbmQpLAo+IC0JCQkJ ICAgR0ZQX0tFUk5FTCk7Cj4gLQlpZiAoIW51YzkwMF9uYW5kKQo+IC0JCXJldHVybiAtRU5PTUVN Owo+IC0JY2hpcCA9ICYobnVjOTAwX25hbmQtPmNoaXApOwo+IC0JbXRkID0gbmFuZF90b19tdGQo Y2hpcCk7Cj4gLQo+IC0JbXRkLT5kZXYucGFyZW50CQk9ICZwZGV2LT5kZXY7Cj4gLQlzcGluX2xv Y2tfaW5pdCgmbnVjOTAwX25hbmQtPmxvY2spOwo+IC0KPiAtCW51YzkwMF9uYW5kLT5jbGsgPSBk ZXZtX2Nsa19nZXQoJnBkZXYtPmRldiwgTlVMTCk7Cj4gLQlpZiAoSVNfRVJSKG51YzkwMF9uYW5k LT5jbGspKQo+IC0JCXJldHVybiAtRU5PRU5UOwo+IC0JY2xrX2VuYWJsZShudWM5MDBfbmFuZC0+ Y2xrKTsKPiAtCj4gLQljaGlwLT5sZWdhY3kuY21kZnVuYwk9IG51YzkwMF9uYW5kX2NvbW1hbmRf bHA7Cj4gLQljaGlwLT5sZWdhY3kuZGV2X3JlYWR5CT0gbnVjOTAwX25hbmRfZGV2cmVhZHk7Cj4g LQljaGlwLT5sZWdhY3kucmVhZF9ieXRlCT0gbnVjOTAwX25hbmRfcmVhZF9ieXRlOwo+IC0JY2hp cC0+bGVnYWN5LndyaXRlX2J1Zgk9IG51YzkwMF9uYW5kX3dyaXRlX2J1ZjsKPiAtCWNoaXAtPmxl Z2FjeS5yZWFkX2J1Zgk9IG51YzkwMF9uYW5kX3JlYWRfYnVmOwo+IC0JY2hpcC0+bGVnYWN5LmNo aXBfZGVsYXkJPSA1MDsKPiAtCWNoaXAtPm9wdGlvbnMJCT0gMDsKPiAtCWNoaXAtPmVjYy5tb2Rl CQk9IE5BTkRfRUNDX1NPRlQ7Cj4gLQljaGlwLT5lY2MuYWxnbwkJPSBOQU5EX0VDQ19IQU1NSU5H Owo+IC0KPiAtCXJlcyA9IHBsYXRmb3JtX2dldF9yZXNvdXJjZShwZGV2LCBJT1JFU09VUkNFX01F TSwgMCk7Cj4gLQludWM5MDBfbmFuZC0+cmVnID0gZGV2bV9pb3JlbWFwX3Jlc291cmNlKCZwZGV2 LT5kZXYsIHJlcyk7Cj4gLQlpZiAoSVNfRVJSKG51YzkwMF9uYW5kLT5yZWcpKQo+IC0JCXJldHVy biBQVFJfRVJSKG51YzkwMF9uYW5kLT5yZWcpOwo+IC0KPiAtCW51YzkwMF9uYW5kX2VuYWJsZShu dWM5MDBfbmFuZCk7Cj4gLQo+IC0JaWYgKG5hbmRfc2NhbihjaGlwLCAxKSkKPiAtCQlyZXR1cm4g LUVOWElPOwo+IC0KPiAtCW10ZF9kZXZpY2VfcmVnaXN0ZXIobXRkLCBwYXJ0aXRpb25zLCBBUlJB WV9TSVpFKHBhcnRpdGlvbnMpKTsKPiAtCj4gLQlwbGF0Zm9ybV9zZXRfZHJ2ZGF0YShwZGV2LCBu dWM5MDBfbmFuZCk7Cj4gLQo+IC0JcmV0dXJuIDA7Cj4gLX0KPiAtCj4gLXN0YXRpYyBpbnQgbnVj OTAwX25hbmRfcmVtb3ZlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCj4gLXsKPiAtCXN0 cnVjdCBudWM5MDBfbmFuZCAqbnVjOTAwX25hbmQgPSBwbGF0Zm9ybV9nZXRfZHJ2ZGF0YShwZGV2 KTsKPiAtCj4gLQluYW5kX3JlbGVhc2UoJm51YzkwMF9uYW5kLT5jaGlwKTsKPiAtCWNsa19kaXNh YmxlKG51YzkwMF9uYW5kLT5jbGspOwo+IC0KPiAtCXJldHVybiAwOwo+IC19Cj4gLQo+IC1zdGF0 aWMgc3RydWN0IHBsYXRmb3JtX2RyaXZlciBudWM5MDBfbmFuZF9kcml2ZXIgPSB7Cj4gLQkucHJv YmUJCT0gbnVjOTAwX25hbmRfcHJvYmUsCj4gLQkucmVtb3ZlCQk9IG51YzkwMF9uYW5kX3JlbW92 ZSwKPiAtCS5kcml2ZXIJCT0gewo+IC0JCS5uYW1lCT0gIm51YzkwMC1mbWkiLAo+IC0JfSwKPiAt fTsKPiAtCj4gLW1vZHVsZV9wbGF0Zm9ybV9kcml2ZXIobnVjOTAwX25hbmRfZHJpdmVyKTsKPiAt Cj4gLU1PRFVMRV9BVVRIT1IoIldhbiBab25nU2h1biA8bWN1b3MuY29tQGdtYWlsLmNvbT4iKTsK PiAtTU9EVUxFX0RFU0NSSVBUSU9OKCJ3OTBwOTEwL05VQzl4eCBuYW5kIGRyaXZlciEiKTsKPiAt TU9EVUxFX0xJQ0VOU0UoIkdQTCIpOwo+IC1NT0RVTEVfQUxJQVMoInBsYXRmb3JtOm51YzkwMC1m bWkiKTsKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX18KTGludXggTVREIGRpc2N1c3Npb24gbWFpbGluZyBsaXN0Cmh0dHA6Ly9saXN0cy5pbmZy YWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtbXRkLwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1BEFC433FF for ; Sat, 10 Aug 2019 08:21:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A4789218AD for ; Sat, 10 Aug 2019 08:21:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726144AbfHJIVZ convert rfc822-to-8bit (ORCPT ); Sat, 10 Aug 2019 04:21:25 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:33940 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725468AbfHJIVZ (ORCPT ); Sat, 10 Aug 2019 04:21:25 -0400 Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 3DE1528CF23; Sat, 10 Aug 2019 09:21:23 +0100 (BST) Date: Sat, 10 Aug 2019 10:21:21 +0200 From: Boris Brezillon To: Arnd Bergmann Cc: soc@kernel.org, Vignesh Raghavendra , Richard Weinberger , linux-kernel@vger.kernel.org, Marek Vasut , linux-mtd@lists.infradead.org, Miquel Raynal , Brian Norris , David Woodhouse Subject: Re: [PATCH 12/16] mtd: rawnand: remove w90x900 driver Message-ID: <20190810102121.07bf8c37@collabora.com> In-Reply-To: <20190809202749.742267-13-arnd@arndb.de> References: <20190809202749.742267-1-arnd@arndb.de> <20190809202749.742267-13-arnd@arndb.de> Organization: Collabora X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 9 Aug 2019 22:27:40 +0200 Arnd Bergmann wrote: > The ARM w90x900 platform is getting removed, so this driver is obsolete. > > Signed-off-by: Arnd Bergmann One less driver to convert to ->exec_op(), Yay! Reviewed-by: Boris Brezillon > --- > drivers/mtd/nand/raw/Kconfig | 8 - > drivers/mtd/nand/raw/Makefile | 1 - > drivers/mtd/nand/raw/nuc900_nand.c | 304 ----------------------------- > 3 files changed, 313 deletions(-) > delete mode 100644 drivers/mtd/nand/raw/nuc900_nand.c > > diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig > index 5a711d8beaca..0e5c5e02ee6f 100644 > --- a/drivers/mtd/nand/raw/Kconfig > +++ b/drivers/mtd/nand/raw/Kconfig > @@ -351,14 +351,6 @@ config MTD_NAND_SOCRATES > help > Enables support for NAND Flash chips wired onto Socrates board. > > -config MTD_NAND_NUC900 > - tristate "Nuvoton NUC9xx/w90p910 NAND controller" > - depends on ARCH_W90X900 || COMPILE_TEST > - depends on HAS_IOMEM > - help > - This enables the driver for the NAND Flash on evaluation board based > - on w90p910 / NUC9xx. > - > source "drivers/mtd/nand/raw/ingenic/Kconfig" > > config MTD_NAND_FSMC > diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile > index efaf5cd25edc..d7f6c237e37c 100644 > --- a/drivers/mtd/nand/raw/Makefile > +++ b/drivers/mtd/nand/raw/Makefile > @@ -41,7 +41,6 @@ obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o > obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o > obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o > obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o > -obj-$(CONFIG_MTD_NAND_NUC900) += nuc900_nand.o > obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o > obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o > obj-$(CONFIG_MTD_NAND_RICOH) += r852.o > diff --git a/drivers/mtd/nand/raw/nuc900_nand.c b/drivers/mtd/nand/raw/nuc900_nand.c > deleted file mode 100644 > index 13bf7b2894d3..000000000000 > --- a/drivers/mtd/nand/raw/nuc900_nand.c > +++ /dev/null > @@ -1,304 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-only > -/* > - * Copyright © 2009 Nuvoton technology corporation. > - * > - * Wan ZongShun > - */ > - > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > - > -#include > -#include > -#include > - > -#define REG_FMICSR 0x00 > -#define REG_SMCSR 0xa0 > -#define REG_SMISR 0xac > -#define REG_SMCMD 0xb0 > -#define REG_SMADDR 0xb4 > -#define REG_SMDATA 0xb8 > - > -#define RESET_FMI 0x01 > -#define NAND_EN 0x08 > -#define READYBUSY (0x01 << 18) > - > -#define SWRST 0x01 > -#define PSIZE (0x01 << 3) > -#define DMARWEN (0x03 << 1) > -#define BUSWID (0x01 << 4) > -#define ECC4EN (0x01 << 5) > -#define WP (0x01 << 24) > -#define NANDCS (0x01 << 25) > -#define ENDADDR (0x01 << 31) > - > -#define read_data_reg(dev) \ > - __raw_readl((dev)->reg + REG_SMDATA) > - > -#define write_data_reg(dev, val) \ > - __raw_writel((val), (dev)->reg + REG_SMDATA) > - > -#define write_cmd_reg(dev, val) \ > - __raw_writel((val), (dev)->reg + REG_SMCMD) > - > -#define write_addr_reg(dev, val) \ > - __raw_writel((val), (dev)->reg + REG_SMADDR) > - > -struct nuc900_nand { > - struct nand_chip chip; > - void __iomem *reg; > - struct clk *clk; > - spinlock_t lock; > -}; > - > -static inline struct nuc900_nand *mtd_to_nuc900(struct mtd_info *mtd) > -{ > - return container_of(mtd_to_nand(mtd), struct nuc900_nand, chip); > -} > - > -static const struct mtd_partition partitions[] = { > - { > - .name = "NAND FS 0", > - .offset = 0, > - .size = 8 * 1024 * 1024 > - }, > - { > - .name = "NAND FS 1", > - .offset = MTDPART_OFS_APPEND, > - .size = MTDPART_SIZ_FULL > - } > -}; > - > -static unsigned char nuc900_nand_read_byte(struct nand_chip *chip) > -{ > - unsigned char ret; > - struct nuc900_nand *nand = mtd_to_nuc900(nand_to_mtd(chip)); > - > - ret = (unsigned char)read_data_reg(nand); > - > - return ret; > -} > - > -static void nuc900_nand_read_buf(struct nand_chip *chip, > - unsigned char *buf, int len) > -{ > - int i; > - struct nuc900_nand *nand = mtd_to_nuc900(nand_to_mtd(chip)); > - > - for (i = 0; i < len; i++) > - buf[i] = (unsigned char)read_data_reg(nand); > -} > - > -static void nuc900_nand_write_buf(struct nand_chip *chip, > - const unsigned char *buf, int len) > -{ > - int i; > - struct nuc900_nand *nand = mtd_to_nuc900(nand_to_mtd(chip)); > - > - for (i = 0; i < len; i++) > - write_data_reg(nand, buf[i]); > -} > - > -static int nuc900_check_rb(struct nuc900_nand *nand) > -{ > - unsigned int val; > - spin_lock(&nand->lock); > - val = __raw_readl(nand->reg + REG_SMISR); > - val &= READYBUSY; > - spin_unlock(&nand->lock); > - > - return val; > -} > - > -static int nuc900_nand_devready(struct nand_chip *chip) > -{ > - struct nuc900_nand *nand = mtd_to_nuc900(nand_to_mtd(chip)); > - int ready; > - > - ready = (nuc900_check_rb(nand)) ? 1 : 0; > - return ready; > -} > - > -static void nuc900_nand_command_lp(struct nand_chip *chip, > - unsigned int command, > - int column, int page_addr) > -{ > - struct mtd_info *mtd = nand_to_mtd(chip); > - struct nuc900_nand *nand = mtd_to_nuc900(mtd); > - > - if (command == NAND_CMD_READOOB) { > - column += mtd->writesize; > - command = NAND_CMD_READ0; > - } > - > - write_cmd_reg(nand, command & 0xff); > - > - if (column != -1 || page_addr != -1) { > - > - if (column != -1) { > - if (chip->options & NAND_BUSWIDTH_16 && > - !nand_opcode_8bits(command)) > - column >>= 1; > - write_addr_reg(nand, column); > - write_addr_reg(nand, column >> 8 | ENDADDR); > - } > - if (page_addr != -1) { > - write_addr_reg(nand, page_addr); > - > - if (chip->options & NAND_ROW_ADDR_3) { > - write_addr_reg(nand, page_addr >> 8); > - write_addr_reg(nand, page_addr >> 16 | ENDADDR); > - } else { > - write_addr_reg(nand, page_addr >> 8 | ENDADDR); > - } > - } > - } > - > - switch (command) { > - case NAND_CMD_CACHEDPROG: > - case NAND_CMD_PAGEPROG: > - case NAND_CMD_ERASE1: > - case NAND_CMD_ERASE2: > - case NAND_CMD_SEQIN: > - case NAND_CMD_RNDIN: > - case NAND_CMD_STATUS: > - return; > - > - case NAND_CMD_RESET: > - if (chip->legacy.dev_ready) > - break; > - udelay(chip->legacy.chip_delay); > - > - write_cmd_reg(nand, NAND_CMD_STATUS); > - write_cmd_reg(nand, command); > - > - while (!nuc900_check_rb(nand)) > - ; > - > - return; > - > - case NAND_CMD_RNDOUT: > - write_cmd_reg(nand, NAND_CMD_RNDOUTSTART); > - return; > - > - case NAND_CMD_READ0: > - write_cmd_reg(nand, NAND_CMD_READSTART); > - /* fall through */ > - > - default: > - > - if (!chip->legacy.dev_ready) { > - udelay(chip->legacy.chip_delay); > - return; > - } > - } > - > - /* Apply this short delay always to ensure that we do wait tWB in > - * any case on any machine. */ > - ndelay(100); > - > - while (!chip->legacy.dev_ready(chip)) > - ; > -} > - > - > -static void nuc900_nand_enable(struct nuc900_nand *nand) > -{ > - unsigned int val; > - spin_lock(&nand->lock); > - __raw_writel(RESET_FMI, (nand->reg + REG_FMICSR)); > - > - val = __raw_readl(nand->reg + REG_FMICSR); > - > - if (!(val & NAND_EN)) > - __raw_writel(val | NAND_EN, nand->reg + REG_FMICSR); > - > - val = __raw_readl(nand->reg + REG_SMCSR); > - > - val &= ~(SWRST|PSIZE|DMARWEN|BUSWID|ECC4EN|NANDCS); > - val |= WP; > - > - __raw_writel(val, nand->reg + REG_SMCSR); > - > - spin_unlock(&nand->lock); > -} > - > -static int nuc900_nand_probe(struct platform_device *pdev) > -{ > - struct nuc900_nand *nuc900_nand; > - struct nand_chip *chip; > - struct mtd_info *mtd; > - struct resource *res; > - > - nuc900_nand = devm_kzalloc(&pdev->dev, sizeof(struct nuc900_nand), > - GFP_KERNEL); > - if (!nuc900_nand) > - return -ENOMEM; > - chip = &(nuc900_nand->chip); > - mtd = nand_to_mtd(chip); > - > - mtd->dev.parent = &pdev->dev; > - spin_lock_init(&nuc900_nand->lock); > - > - nuc900_nand->clk = devm_clk_get(&pdev->dev, NULL); > - if (IS_ERR(nuc900_nand->clk)) > - return -ENOENT; > - clk_enable(nuc900_nand->clk); > - > - chip->legacy.cmdfunc = nuc900_nand_command_lp; > - chip->legacy.dev_ready = nuc900_nand_devready; > - chip->legacy.read_byte = nuc900_nand_read_byte; > - chip->legacy.write_buf = nuc900_nand_write_buf; > - chip->legacy.read_buf = nuc900_nand_read_buf; > - chip->legacy.chip_delay = 50; > - chip->options = 0; > - chip->ecc.mode = NAND_ECC_SOFT; > - chip->ecc.algo = NAND_ECC_HAMMING; > - > - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > - nuc900_nand->reg = devm_ioremap_resource(&pdev->dev, res); > - if (IS_ERR(nuc900_nand->reg)) > - return PTR_ERR(nuc900_nand->reg); > - > - nuc900_nand_enable(nuc900_nand); > - > - if (nand_scan(chip, 1)) > - return -ENXIO; > - > - mtd_device_register(mtd, partitions, ARRAY_SIZE(partitions)); > - > - platform_set_drvdata(pdev, nuc900_nand); > - > - return 0; > -} > - > -static int nuc900_nand_remove(struct platform_device *pdev) > -{ > - struct nuc900_nand *nuc900_nand = platform_get_drvdata(pdev); > - > - nand_release(&nuc900_nand->chip); > - clk_disable(nuc900_nand->clk); > - > - return 0; > -} > - > -static struct platform_driver nuc900_nand_driver = { > - .probe = nuc900_nand_probe, > - .remove = nuc900_nand_remove, > - .driver = { > - .name = "nuc900-fmi", > - }, > -}; > - > -module_platform_driver(nuc900_nand_driver); > - > -MODULE_AUTHOR("Wan ZongShun "); > -MODULE_DESCRIPTION("w90p910/NUC9xx nand driver!"); > -MODULE_LICENSE("GPL"); > -MODULE_ALIAS("platform:nuc900-fmi");