From: Cornelia Huck <cohuck@redhat.com>
To: David Hildenbrand <david@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>,
Janosch Frank <frankja@linux.ibm.com>,
qemu-devel@nongnu.org, Halil Pasic <pasic@linux.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH-for-4.2 v1 5/6] s390x/mmu: Better storage key reference and change bit handling
Date: Tue, 13 Aug 2019 16:54:27 +0200 [thread overview]
Message-ID: <20190813165427.14b2024c.cohuck@redhat.com> (raw)
In-Reply-To: <20190812112737.6652-6-david@redhat.com>
On Mon, 12 Aug 2019 13:27:36 +0200
David Hildenbrand <david@redhat.com> wrote:
> Any access sets the reference bit. In case we have a read-fault, we
> should not allow writes to the TLB entry if the change bit was not
> already set.
>
> This is a preparation for proper storage-key reference/change bit handling
> in TCG and a fix for KVM whereby read accesses would set the change
> bit (old KVM versions without the ioctl to carry out the translation).
That would be really old kvm versions, right? So no real need to e.g.
cc:stable?
>
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
> target/s390x/mmu_helper.c | 24 +++++++++++++++++++-----
> 1 file changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
> index 227a822e42..ba4b460ac6 100644
> --- a/target/s390x/mmu_helper.c
> +++ b/target/s390x/mmu_helper.c
> @@ -421,14 +421,28 @@ nodat:
> return 0;
> }
>
> - if (*flags & PAGE_READ) {
> - key |= SK_R;
> - }
> -
> - if (*flags & PAGE_WRITE) {
> + switch (rw) {
> + case MMU_DATA_LOAD:
> + case MMU_INST_FETCH:
> + /*
> + * The TLB entry has to remain write-protected on read-faults if
> + * the storage key does not indicate a change already. Otherwise
> + * we might miss setting the change bit on write accesses.
> + */
> + if (!(key & SK_C)) {
> + *flags &= ~PAGE_WRITE;
> + }
> + break;
> + case MMU_DATA_STORE:
> key |= SK_C;
> + break;
> + default:
> + g_assert_not_reached();
> }
>
> + /* Any store/fetch sets the reference bit */
> + key |= SK_R;
> +
> r = skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key);
> if (r) {
> trace_set_skeys_nonzero(r);
I've stared at this for quite some time now and have convinced myself
that it looks sane.
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
next prev parent reply other threads:[~2019-08-13 14:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-12 11:27 [Qemu-devel] [PATCH-for-4.2 v1 0/6] s390x/mmu: Storage key reference and change bit handling David Hildenbrand
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 1/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug() David Hildenbrand
2019-08-12 15:18 ` [Qemu-devel] [qemu-s390x] " Thomas Huth
2019-08-12 15:28 ` David Hildenbrand
2019-08-12 15:39 ` David Hildenbrand
2019-08-12 16:04 ` Thomas Huth
2019-08-13 12:51 ` [Qemu-devel] " Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection for instruction fetches David Hildenbrand
2019-08-12 13:37 ` David Hildenbrand
2019-08-13 12:52 ` Cornelia Huck
2019-08-13 12:53 ` David Hildenbrand
2019-08-13 13:16 ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 3/6] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE David Hildenbrand
2019-08-13 13:42 ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 4/6] s390x/mmu: Trace the right value if setting/getting the storage key fails David Hildenbrand
2019-08-12 13:01 ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 5/6] s390x/mmu: Better storage key reference and change bit handling David Hildenbrand
2019-08-13 14:54 ` Cornelia Huck [this message]
2019-08-14 7:20 ` [Qemu-devel] [qemu-s390x] " David Hildenbrand
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 6/6] s390x/mmu: Factor out storage key handling David Hildenbrand
2019-08-13 15:04 ` Cornelia Huck
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