All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Mario.Limonciello@dell.com
Cc: linux-kernel@vger.kernel.org, andreas.noever@gmail.com,
	michael.jamet@intel.com, YehezkelShB@gmail.com,
	rjw@rjwysocki.net, lenb@kernel.org, lukas@wunner.de,
	anthony.wong@canonical.com, rajmohan.mani@intel.com,
	raanan.avargil@intel.com, David.Laight@aculab.com,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH v3 0/8] thunderbolt: Intel Ice Lake support
Date: Tue, 20 Aug 2019 13:01:33 +0300	[thread overview]
Message-ID: <20190820100133.GE19908@lahna.fi.intel.com> (raw)
In-Reply-To: <54e61cff57854068bb3f1188a9d12ee6@AUSX13MPC101.AMER.DELL.COM>

On Mon, Aug 19, 2019 at 07:36:37PM +0000, Mario.Limonciello@dell.com wrote:
> After checking, this is not introduced by this series, it happens on v5.3-rc5 as well.
> It's a problem in pciehp that will be debugged separately.
> 
> So the Thunderbolt portion of this works for me on ICL system.
> 
> Tested-by: Mario Limonciello <mario.limonciello@dell.com>

Thanks for testing!

Regarding the issue, can you file a kernel bugzilla about it with the
necessary dmesg and 'sudo lspci -vv' output so we can track it? I'll
also try to reproduce it here.

  reply	other threads:[~2019-08-20 10:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-19 11:22 [PATCH v3 0/8] thunderbolt: Intel Ice Lake support Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 1/8] thunderbolt: Correct path indices for PCIe tunnel Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 2/8] thunderbolt: Move NVM upgrade support flag to struct icm Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 3/8] thunderbolt: Use 32-bit writes when writing ring producer/consumer Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 4/8] thunderbolt: Do not fail adding switch if some port is not implemented Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 5/8] thunderbolt: Hide switch attributes that are not set Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 6/8] thunderbolt: Expose active parts of NVM even if upgrade is not supported Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 7/8] thunderbolt: Add support for Intel Ice Lake Mika Westerberg
2019-08-19 11:22 ` [PATCH v3 8/8] ACPI / property: Add two new Thunderbolt property GUIDs to the list Mika Westerberg
2019-08-19 16:29 ` [PATCH v3 0/8] thunderbolt: Intel Ice Lake support Mario.Limonciello
2019-08-19 17:57   ` Mika Westerberg
2019-08-19 18:22     ` Mario.Limonciello
2019-08-19 19:36       ` Mario.Limonciello
2019-08-20 10:01         ` Mika Westerberg [this message]
2019-08-20 11:34   ` Lukas Wunner
2019-08-20 17:00     ` Mario.Limonciello
2019-08-26  9:20 ` Mika Westerberg

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190820100133.GE19908@lahna.fi.intel.com \
    --to=mika.westerberg@linux.intel.com \
    --cc=David.Laight@aculab.com \
    --cc=Mario.Limonciello@dell.com \
    --cc=YehezkelShB@gmail.com \
    --cc=andreas.noever@gmail.com \
    --cc=anthony.wong@canonical.com \
    --cc=lenb@kernel.org \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lukas@wunner.de \
    --cc=michael.jamet@intel.com \
    --cc=raanan.avargil@intel.com \
    --cc=rajmohan.mani@intel.com \
    --cc=rjw@rjwysocki.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.