* [PATCH 1/5] rtlwifi: rtl8192ee: Remove unused GET_XXX and SET_XXX
2019-08-31 18:06 [PATCH 0/5] rtlwifi: rtl8192ee: Replace local TX and RX bit manipulation macros Larry Finger
@ 2019-08-31 18:06 ` Larry Finger
2019-09-03 13:31 ` Kalle Valo
2019-08-31 18:06 ` [PATCH 2/5] rtlwifi: rtl8192ee: Replace local bit manipulation macros Larry Finger
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Larry Finger @ 2019-08-31 18:06 UTC (permalink / raw)
To: kvalo; +Cc: linux-wireless, pkshih, Larry Finger
As the first step in converting from macros that get/set information
in the RX and TX descriptors, unused macros are being removed.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
---
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.h | 243 +--------------------
1 file changed, 2 insertions(+), 241 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
index a9e5e620a653..9a68edd3ea0a 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
@@ -28,125 +28,34 @@
SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val)
#define SET_TX_DESC_LINIP(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val)
-#define SET_TX_DESC_NO_ACM(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val)
-#define SET_TX_DESC_GF(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
#define SET_TX_DESC_OWN(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
-#define GET_TX_DESC_PKT_SIZE(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 0, 16)
-#define GET_TX_DESC_OFFSET(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 16, 8)
-#define GET_TX_DESC_BMC(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 24, 1)
-#define GET_TX_DESC_HTC(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 25, 1)
-#define GET_TX_DESC_LAST_SEG(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 26, 1)
-#define GET_TX_DESC_FIRST_SEG(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 27, 1)
-#define GET_TX_DESC_LINIP(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 28, 1)
-#define GET_TX_DESC_NO_ACM(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 29, 1)
-#define GET_TX_DESC_GF(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 30, 1)
#define GET_TX_DESC_OWN(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc, 31, 1)
#define SET_TX_DESC_MACID(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 7, __val)
#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val)
-#define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val)
-#define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val)
-#define SET_TX_DESC_PIFS(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val)
#define SET_TX_DESC_RATE_ID(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 5, __val)
-#define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val)
#define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val)
#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 5, __val)
-#define SET_TX_DESC_MORE_DATA(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 29, 1, __val)
-#define SET_TX_DESC_TXOP_PS_CAP(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 30, 1, __val)
-#define SET_TX_DESC_TXOP_PS_MODE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 31, 1, __val)
-
-#define GET_TX_DESC_MACID(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 0, 5)
-#define GET_TX_DESC_AGG_ENABLE(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 5, 1)
-#define GET_TX_DESC_AGG_BREAK(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 6, 1)
-#define GET_TX_DESC_RDG_ENABLE(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 7, 1)
-#define GET_TX_DESC_QUEUE_SEL(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 8, 5)
-#define GET_TX_DESC_RDG_NAV_EXT(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 13, 1)
-#define GET_TX_DESC_LSIG_TXOP_EN(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
-#define GET_TX_DESC_PIFS(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
-#define GET_TX_DESC_RATE_ID(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
-#define GET_TX_DESC_NAV_USE_HDR(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 20, 1)
-#define GET_TX_DESC_EN_DESC_ID(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 21, 1)
-#define GET_TX_DESC_SEC_TYPE(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 22, 2)
-#define GET_TX_DESC_PKT_OFFSET(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 24, 5)
-
-#define SET_TX_DESC_PAID(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 9, __val)
-#define SET_TX_DESC_CCA_RTS(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 10, 2, __val)
+
#define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val)
#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val)
-#define SET_TX_DESC_NULL_0(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 1, __val)
-#define SET_TX_DESC_NULL_1(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 8, 15, 1, __val)
-#define SET_TX_DESC_BK(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 16, 1, __val)
#define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val)
-#define SET_TX_DESC_RAW(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val)
-#define SET_TX_DESC_SPE_RPT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 8, 19, 1, __val)
#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val)
-#define SET_TX_DESC_BT_NULL(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 23, 1, __val)
-#define SET_TX_DESC_GID(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 6, __val)
-
-#define SET_TX_DESC_WHEADER_LEN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 4, __val)
-#define SET_TX_DESC_CHK_EN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 4, 1, __val)
-#define SET_TX_DESC_EARLY_RATE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 5, 1, __val)
-#define SET_TX_DESC_HWSEQ_SEL(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 6, 2, __val)
+
#define SET_TX_DESC_USE_RATE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 1, __val)
-#define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 9, 1, __val)
#define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+12, 10, 1, __val)
#define SET_TX_DESC_CTS2SELF(__pdesc, __val) \
@@ -155,102 +64,38 @@
SET_BITS_TO_LE_4BYTE(__pdesc+12, 12, 1, __val)
#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+12, 13, 1, __val)
-#define SET_TX_DESC_HW_PORT_ID(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 14, 1, __val)
#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+12, 15, 1, __val)
-#define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 1, __val)
#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+12, 17, 5, __val)
-#define SET_TX_DESC_NDPA(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 22, 2, __val)
-#define SET_TX_DESC_AMPDU_MAX_TIME(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 24, 8, __val)
/* Dword 4 */
#define SET_TX_DESC_TX_RATE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 7, __val)
-#define SET_TX_DESC_TRY_RATE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 7, 1, __val)
#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 5, __val)
#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 4, __val)
-#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 17, 1, __val)
-#define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 6, __val)
#define SET_TX_DESC_RTS_RATE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 5, __val)
-#define SET_TX_DESC_PCTS_ENABLE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 29, 1, __val)
-#define SET_TX_DESC_PCTS_MASK_IDX(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 30, 2, __val)
/* Dword 5 */
#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 4, __val)
-#define SET_TX_DESC_DATA_SHORT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 4, 1, __val)
#define SET_TX_DESC_DATA_BW(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+20, 5, 2, __val)
-#define SET_TX_DESC_DATA_LDPC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val)
-#define SET_TX_DESC_DATA_STBC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 2, __val)
-#define SET_TX_DESC_VCS_STBC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 10, 2, __val)
#define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+20, 12, 1, __val)
#define SET_TX_DESC_RTS_SC(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val)
-#define SET_TX_DESC_TX_ANT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 4, __val)
-#define SET_TX_DESC_TX_POWER_0_PSET(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 28, 3, __val)
-
-/* Dword 6 */
-#define SET_TX_DESC_SW_DEFINE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 0, 12, __val)
-#define SET_TX_DESC_ANTSEL_A(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 16, 3, __val)
-#define SET_TX_DESC_ANTSEL_B(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 19, 3, __val)
-#define SET_TX_DESC_ANTSEL_C(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 22, 3, __val)
-#define SET_TX_DESC_ANTSEL_D(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 25, 3, __val)
/* Dword 7 */
#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val)
-#define SET_TX_DESC_USB_TXAGG_NUM(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+28, 24, 8, __val)
-
-/* Dword 8 */
-#define SET_TX_DESC_RTS_RC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+32, 0, 6, __val)
-#define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+32, 6, 2, __val)
-#define SET_TX_DESC_DATA_RC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+32, 8, 6, __val)
-#define SET_TX_DESC_ENABLE_HW_SELECT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+32, 15, 1, __val)
-#define SET_TX_DESC_NEXT_HEAD_PAGE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+32, 16, 8, __val)
-#define SET_TX_DESC_TAIL_PAGE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+32, 24, 8, __val)
/* Dword 9 */
-#define SET_TX_DESC_PADDING_LENGTH(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+36, 0, 11, __val)
-#define SET_TX_DESC_TXBF_PATH(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+36, 11, 1, __val)
#define SET_TX_DESC_SEQ(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc+36, 12, 12, __val)
-#define SET_TX_DESC_FINAL_DATA_RATE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+36, 24, 8, __val)
/* Dword 10 */
#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \
@@ -266,12 +111,6 @@
SET_BITS_TO_LE_4BYTE(__paddr, 4, 15, __val)
#define SET_EARLYMODE_LEN1(__paddr, __val) \
SET_BITS_TO_LE_4BYTE(__paddr, 16, 2, __val)
-#define SET_EARLYMODE_LEN1_1(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr, 19, 13, __val)
-#define SET_EARLYMODE_LEN1_2(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 2, __val)
-#define SET_EARLYMODE_LEN2(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr+4, 2, 15, __val)
#define SET_EARLYMODE_LEN2_1(__paddr, __val) \
SET_BITS_TO_LE_4BYTE(__paddr, 2, 4, __val)
#define SET_EARLYMODE_LEN2_2(__paddr, __val) \
@@ -283,13 +122,6 @@
/* TX/RX buffer descriptor */
-#define SET_TX_EXTBUFF_DESC_LEN(__pdesc, __val, __set) \
- SET_BITS_TO_LE_4BYTE(__pdesc+(__set*16), 0, 16, __val)
-#define SET_TX_EXTBUFF_DESC_ADDR_LOW(__pdesc, __val, __set)\
- SET_BITS_TO_LE_4BYTE(__pdesc+(__set*16)+4, 0, 32, __val)
-#define SET_TX_EXTBUFF_DESC_ADDR_HIGH(__pdesc, __val, __set)\
- SET_BITS_TO_LE_4BYTE(__pdesc+(__set*16)+8, 0, 32, __val)
-
/* for Txfilldescroptor92ee, fill the desc content. */
#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pdesc, __offset, __val) \
SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16), 0, 16, __val)
@@ -332,8 +164,6 @@
#define SET_RX_BUFFER_DESC_TOTAL_LENGTH(__status, __val) \
SET_BITS_TO_LE_4BYTE(__status, 16, 15, __val)
-#define GET_RX_BUFFER_DESC_OWN(__status) \
- LE_BITS_TO_4BYTE(__status, 31, 1)
#define GET_RX_BUFFER_DESC_LS(__status) \
LE_BITS_TO_4BYTE(__status, 15, 1)
#define GET_RX_BUFFER_DESC_FS(__status) \
@@ -357,87 +187,27 @@
LE_BITS_TO_4BYTE(__pdesc, 15, 1)
#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc, 16, 4)
-#define GET_RX_DESC_SECURITY(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 20, 3)
-#define GET_RX_DESC_QOS(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 23, 1)
#define GET_RX_DESC_SHIFT(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc, 24, 2)
#define GET_RX_DESC_PHYST(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc, 26, 1)
#define GET_RX_DESC_SWDEC(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc, 27, 1)
-#define GET_RX_DESC_LS(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 28, 1)
-#define GET_RX_DESC_FS(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 29, 1)
-#define GET_RX_DESC_EOR(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 30, 1)
#define GET_RX_DESC_OWN(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc, 31, 1)
-#define SET_RX_DESC_PKT_LEN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
#define SET_RX_DESC_EOR(__pdesc, __val) \
SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
-#define SET_RX_DESC_OWN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
#define GET_RX_DESC_MACID(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc+4, 0, 7)
-#define GET_RX_DESC_TID(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 8, 4)
-#define GET_RX_DESC_MACID_VLD(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 12, 1)
-#define GET_RX_DESC_AMSDU(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 13, 1)
-#define GET_RX_DESC_RXID_MATCH(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
#define GET_RX_DESC_PAGGR(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
-#define GET_RX_DESC_A1_FIT(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
-#define GET_RX_DESC_TCPOFFLOAD_CHKERR(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 20, 1)
-#define GET_RX_DESC_TCPOFFLOAD_IPVER(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 21, 1)
-#define GET_RX_DESC_TCPOFFLOAD_IS_TCPUDP(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 22, 1)
-#define GET_RX_DESC_TCPOFFLOAD_CHK_VLD(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 23, 1)
-#define GET_RX_DESC_PAM(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 24, 1)
-#define GET_RX_DESC_PWR(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 25, 1)
-#define GET_RX_DESC_MD(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 26, 1)
-#define GET_RX_DESC_MF(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 27, 1)
-#define GET_RX_DESC_TYPE(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 28, 2)
-#define GET_RX_DESC_MC(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 30, 1)
-#define GET_RX_DESC_BC(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 31, 1)
-#define GET_RX_DESC_SEQ(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+8, 0, 12)
-#define GET_RX_DESC_FRAG(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+8, 12, 4)
-#define GET_RX_DESC_RX_IS_QOS(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+8, 16, 1)
#define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc+8, 28, 1)
#define GET_RX_DESC_RXMCS(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc+12, 0, 7)
-#define GET_RX_DESC_HTC(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 10, 1)
-#define GET_RX_STATUS_DESC_EOSP(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 11, 1)
-#define GET_RX_STATUS_DESC_BSSID_FIT(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 12, 2)
-#define GET_RX_STATUS_DESC_DMA_AGG_NUM(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 16, 8)
#define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc+12, 29, 1)
#define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \
@@ -450,18 +220,9 @@
#define GET_RX_DESC_BUFF_ADDR(__pdesc) \
LE_BITS_TO_4BYTE(__pdesc+24, 0, 32)
-#define GET_RX_DESC_BUFF_ADDR64(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+28, 0, 32)
-
-#define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val)
-#define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val)
/* TX report 2 format in Rx desc*/
-#define GET_RX_RPT2_DESC_PKT_LEN(__status) \
- LE_BITS_TO_4BYTE(__status, 0, 9)
#define GET_RX_RPT2_DESC_MACID_VALID_1(__status) \
LE_BITS_TO_4BYTE(__status+16, 0, 32)
#define GET_RX_RPT2_DESC_MACID_VALID_2(__status) \
--
2.16.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/5] rtlwifi: rtl8192ee: Replace local bit manipulation macros
2019-08-31 18:06 [PATCH 0/5] rtlwifi: rtl8192ee: Replace local TX and RX bit manipulation macros Larry Finger
2019-08-31 18:06 ` [PATCH 1/5] rtlwifi: rtl8192ee: Remove unused GET_XXX and SET_XXX Larry Finger
@ 2019-08-31 18:06 ` Larry Finger
2019-08-31 18:06 ` [PATCH 3/5] rtlwifi: rtl8192ee: Convert macros that set descriptor Larry Finger
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Larry Finger @ 2019-08-31 18:06 UTC (permalink / raw)
To: kvalo; +Cc: linux-wireless, pkshih, Larry Finger
This driver uses a set of local macros to manipulate the RX and TX
descriptors, which are all little-endian quantities. These macros
are replaced by the bitfield macros le32p_replace_bits() and
le32_get_bits(). In several places, the macros operated on an entire
32-bit word. In these cases, a direct read or replacement is used.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
---
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.h | 168 ++++++++++-----------
1 file changed, 84 insertions(+), 84 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
index 9a68edd3ea0a..3b00072ba5d2 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
@@ -15,218 +15,218 @@
#define MAX_RECEIVE_BUFFER_SIZE 8192
#define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(15, 0))
#define SET_TX_DESC_OFFSET(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(23, 16))
#define SET_TX_DESC_BMC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(24))
#define SET_TX_DESC_HTC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(25))
#define SET_TX_DESC_LAST_SEG(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(26))
#define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(27))
#define SET_TX_DESC_LINIP(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(28))
#define SET_TX_DESC_OWN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31))
#define GET_TX_DESC_OWN(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 31, 1)
+ le32_get_bits(*((__le32 *)__pdesc), BIT(31))
#define SET_TX_DESC_MACID(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 7, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(6, 0))
#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(12, 8))
#define SET_TX_DESC_RATE_ID(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 5, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(20, 16))
#define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(23, 22))
#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 5, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(28, 24))
#define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(12))
#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(13))
#define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(17))
#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, GENMASK(22, 20))
#define SET_TX_DESC_USE_RATE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(8))
#define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 10, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(10))
#define SET_TX_DESC_CTS2SELF(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 11, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(11))
#define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 12, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(12))
#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 13, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(13))
#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 15, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(15))
#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+12, 17, 5, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, GENMASK(21, 17))
/* Dword 4 */
#define SET_TX_DESC_TX_RATE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 7, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(6, 0))
#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 5, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(12, 8))
#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 4, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(16, 13))
#define SET_TX_DESC_RTS_RATE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 5, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(28, 24))
/* Dword 5 */
#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 4, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(3, 0))
#define SET_TX_DESC_DATA_BW(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 5, 2, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(6, 5))
#define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 12, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, BIT(12))
#define SET_TX_DESC_RTS_SC(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(16, 13))
/* Dword 7 */
#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 28), __val, GENMASK(15, 0))
/* Dword 9 */
#define SET_TX_DESC_SEQ(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+36, 12, 12, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 36), __val, GENMASK(23, 12))
/* Dword 10 */
#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val)
+ *(__le32 *)(__pdesc + 40) = cpu_to_le32(__val)
/* Dword 11*/
#define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc+48, 0, 32, __val)
+ *(__le32 *)(__pdesc + 48) = cpu_to_le32(__val)
#define SET_EARLYMODE_PKTNUM(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __val)
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(3, 0))
#define SET_EARLYMODE_LEN0(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr, 4, 15, __val)
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(18, 4))
#define SET_EARLYMODE_LEN1(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr, 16, 2, __val)
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(17, 16))
#define SET_EARLYMODE_LEN2_1(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr, 2, 4, __val)
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(5, 2))
#define SET_EARLYMODE_LEN2_2(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 8, __val)
+ le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(7, 0))
#define SET_EARLYMODE_LEN3(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr+4, 17, 15, __val)
+ le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 17))
#define SET_EARLYMODE_LEN4(__paddr, __val) \
- SET_BITS_TO_LE_4BYTE(__paddr+4, 20, 12, __val)
+ le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 20))
/* TX/RX buffer descriptor */
/* for Txfilldescroptor92ee, fill the desc content. */
#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pdesc, __offset, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16), 0, 16, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val, \
+ GENMASK(15, 0))
#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pdesc, __offset, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16), 31, 1, __val)
+ le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val, BIT(31))
#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pdesc, __offset, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16) + 4, 0, 32, __val)
+ *(__le32 *)(__pdesc + 16 * __offset + 4) = cpu_to_le32(__val)
#define SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(pbd, off, val, dma64) \
- (dma64 ? SET_BITS_TO_LE_4BYTE((pbd) + ((off) * 16) + 8, 0, 32, val) : 0)
+ *(__le32 *)(pbd + 16 * off + 8) = dma64 ? cpu_to_le32(val) : 0
#define GET_TXBUFFER_DESC_ADDR_LOW(__pdesc, __offset) \
- LE_BITS_TO_4BYTE((__pdesc) + ((__offset) * 16) + 4, 0, 32)
+ le32_to_cpu(*((__le32 *)(__pdesc + 16 * __offset + 4)))
#define GET_TXBUFFER_DESC_ADDR_HIGH(pbd, off, dma64) \
- (dma64 ? LE_BITS_TO_4BYTE((pbd) + ((off) * 16) + 8, 0, 32) : 0)
+ (dma64 ? le32_to_cpu(*((__le32 *)(pbd + 16 * off + 8))) : 0)
/* Dword 0 */
#define SET_TX_BUFF_DESC_LEN_0(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(13, 0))
#define SET_TX_BUFF_DESC_PSB(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 16, 15, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(30, 16))
#define SET_TX_BUFF_DESC_OWN(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31))
/* Dword 1 */
#define SET_TX_BUFF_DESC_ADDR_LOW_0(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE((__pdesc) + 4, 0, 32, __val)
+ *(__le32 *)(__pdesc + 4) = cpu_to_le32(__val)
/* Dword 2 */
#define SET_TX_BUFF_DESC_ADDR_HIGH_0(bdesc, val, dma64) \
SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(bdesc, 0, val, dma64)
-/* Dword 3 / RESERVED 0 */
/* RX buffer */
/* DWORD 0 */
#define SET_RX_BUFFER_DESC_DATA_LENGTH(__status, __val) \
- SET_BITS_TO_LE_4BYTE(__status, 0, 14, __val)
+ le32p_replace_bits((__le32 *)__status, __val, GENMASK(13, 0))
#define SET_RX_BUFFER_DESC_LS(__status, __val) \
- SET_BITS_TO_LE_4BYTE(__status, 15, 1, __val)
+ le32p_replace_bits((__le32 *)__status, __val, BIT(15))
#define SET_RX_BUFFER_DESC_FS(__status, __val) \
- SET_BITS_TO_LE_4BYTE(__status, 16, 1, __val)
+ le32p_replace_bits((__le32 *)__status, __val, BIT(16))
#define SET_RX_BUFFER_DESC_TOTAL_LENGTH(__status, __val) \
- SET_BITS_TO_LE_4BYTE(__status, 16, 15, __val)
+ le32p_replace_bits((__le32 *)__status, __val, GENMASK(30, 16))
#define GET_RX_BUFFER_DESC_LS(__status) \
- LE_BITS_TO_4BYTE(__status, 15, 1)
+ le32_get_bits(*((__le32 *)__status), BIT(15))
#define GET_RX_BUFFER_DESC_FS(__status) \
- LE_BITS_TO_4BYTE(__status, 16, 1)
+ le32_get_bits(*((__le32 *)__status), BIT(16))
#define GET_RX_BUFFER_DESC_TOTAL_LENGTH(__status) \
- LE_BITS_TO_4BYTE(__status, 16, 15)
+ le32_get_bits(*((__le32 *)__status), GENMASK(30, 16))
/* DWORD 1 */
#define SET_RX_BUFFER_PHYSICAL_LOW(__status, __val) \
- SET_BITS_TO_LE_4BYTE(__status+4, 0, 32, __val)
+ *(__le32 *)(__status + 4) = cpu_to_le32(__val)
/* DWORD 2 */
#define SET_RX_BUFFER_PHYSICAL_HIGH(__rx_status_desc, __val, dma64) \
- (dma64 ? SET_BITS_TO_LE_4BYTE((__rx_status_desc) + 8, 0, 32, __val) : 0)
+ *(__le32 *)(__rx_status_desc + 8) = (dma64 ? cpu_to_le32(__val) : 0)
#define GET_RX_DESC_PKT_LEN(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 0, 14)
+ le32_get_bits(*(__le32 *)__pdesc, GENMASK(13, 0))
#define GET_RX_DESC_CRC32(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 14, 1)
+ le32_get_bits(*(__le32 *)__pdesc, BIT(14))
#define GET_RX_DESC_ICV(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 15, 1)
+ le32_get_bits(*(__le32 *)__pdesc, BIT(15))
#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 16, 4)
+ le32_get_bits(*(__le32 *)__pdesc, GENMASK(19, 16))
#define GET_RX_DESC_SHIFT(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 24, 2)
+ le32_get_bits(*(__le32 *)__pdesc, GENMASK(25, 24))
#define GET_RX_DESC_PHYST(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 26, 1)
+ le32_get_bits(*(__le32 *)__pdesc, BIT(26))
#define GET_RX_DESC_SWDEC(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 27, 1)
+ le32_get_bits(*(__le32 *)__pdesc, BIT(27))
#define GET_RX_DESC_OWN(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc, 31, 1)
+ le32_get_bits(*(__le32 *)__pdesc, BIT(31))
#define SET_RX_DESC_EOR(__pdesc, __val) \
- SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(30))
#define GET_RX_DESC_MACID(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 0, 7)
+ le32_get_bits(*(__le32 *)(__pdesc + 4), GENMASK(6, 0))
#define GET_RX_DESC_PAGGR(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
+ le32_get_bits(*(__le32 *)(__pdesc + 4), BIT(15))
#define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+8, 28, 1)
+ le32_get_bits(*(__le32 *)(__pdesc + 8), BIT(28))
#define GET_RX_DESC_RXMCS(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 0, 7)
+ le32_get_bits(*(__le32 *)(__pdesc + 12), GENMASK(6, 0))
#define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 29, 1)
+ le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(29))
#define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 30, 1)
+ le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(30))
#define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+12, 31, 1)
+ le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(31))
#define GET_RX_DESC_TSFL(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+20, 0, 32)
+ le32_to_cpu(*((__le32 *)(__pdesc + 20)))
#define GET_RX_DESC_BUFF_ADDR(__pdesc) \
- LE_BITS_TO_4BYTE(__pdesc+24, 0, 32)
+ le32_to_cpu(*((__le32 *)(__pdesc + 24)))
/* TX report 2 format in Rx desc*/
#define GET_RX_RPT2_DESC_MACID_VALID_1(__status) \
- LE_BITS_TO_4BYTE(__status+16, 0, 32)
+ le32_to_cpu(*((__le32 *)(__status + 16)))
#define GET_RX_RPT2_DESC_MACID_VALID_2(__status) \
- LE_BITS_TO_4BYTE(__status+20, 0, 32)
+ le32_to_cpu(*((__le32 *)(__status + 20)))
#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
do { \
--
2.16.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/5] rtlwifi: rtl8192ee: Convert macros that set descriptor
2019-08-31 18:06 [PATCH 0/5] rtlwifi: rtl8192ee: Replace local TX and RX bit manipulation macros Larry Finger
2019-08-31 18:06 ` [PATCH 1/5] rtlwifi: rtl8192ee: Remove unused GET_XXX and SET_XXX Larry Finger
2019-08-31 18:06 ` [PATCH 2/5] rtlwifi: rtl8192ee: Replace local bit manipulation macros Larry Finger
@ 2019-08-31 18:06 ` Larry Finger
2019-08-31 18:06 ` [PATCH 4/5] rtlwifi: rtl8192ee: Convert inline routines to little-endian words Larry Finger
2019-08-31 18:06 ` [PATCH 5/5] rtlwifi: rtl8192ee: Remove some variable initializations Larry Finger
4 siblings, 0 replies; 7+ messages in thread
From: Larry Finger @ 2019-08-31 18:06 UTC (permalink / raw)
To: kvalo; +Cc: linux-wireless, pkshih, Larry Finger
As a first step in the conversion, the macros that set the RX and TX
descriptors are converted to static inline routines, and the names are
changed from upper to lower case. To minimize the changes in a given
step, the input descriptor information is left as as a byte array
(u8 *), even though it should be a little-endian word array (__le32 *).
That will be changed in the next patch.
Several places where checkpatch.pl reports lines too long are fixed.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
---
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.c | 252 ++++-----
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.h | 605 +++++++++++++++------
2 files changed, 550 insertions(+), 307 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
index d297cfc0fd2b..dedd1cc8c369 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
@@ -277,7 +277,7 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
memset(virtualaddress, 0, 8);
- SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
+ set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
if (ptcb_desc->empkt_num == 1) {
dwtmp = ptcb_desc->empkt_len[0];
} else {
@@ -285,7 +285,7 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += ptcb_desc->empkt_len[1];
}
- SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
+ set_earlymode_len0(virtualaddress, dwtmp);
if (ptcb_desc->empkt_num <= 3) {
dwtmp = ptcb_desc->empkt_len[2];
@@ -294,7 +294,7 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += ptcb_desc->empkt_len[3];
}
- SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
+ set_earlymode_len1(virtualaddress, dwtmp);
if (ptcb_desc->empkt_num <= 5) {
dwtmp = ptcb_desc->empkt_len[4];
} else {
@@ -302,8 +302,8 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += ptcb_desc->empkt_len[5];
}
- SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
- SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
+ set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
+ set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
if (ptcb_desc->empkt_num <= 7) {
dwtmp = ptcb_desc->empkt_len[6];
} else {
@@ -311,7 +311,7 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += ptcb_desc->empkt_len[7];
}
- SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
+ set_earlymode_len3(virtualaddress, dwtmp);
if (ptcb_desc->empkt_num <= 9) {
dwtmp = ptcb_desc->empkt_len[8];
} else {
@@ -319,7 +319,7 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += ptcb_desc->empkt_len[9];
}
- SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
+ set_earlymode_len4(virtualaddress, dwtmp);
}
bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
@@ -330,32 +330,32 @@ bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rx_fwinfo *p_drvinfo;
struct ieee80211_hdr *hdr;
- u32 phystatus = GET_RX_DESC_PHYST(pdesc);
+ u32 phystatus = get_rx_desc_physt(pdesc);
u8 wake_match;
- if (GET_RX_STATUS_DESC_RPT_SEL(pdesc) == 0)
+ if (get_rx_status_desc_rpt_sel(pdesc) == 0)
status->packet_report_type = NORMAL_RX;
else
status->packet_report_type = C2H_PACKET;
- status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
- status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
+ status->length = (u16)get_rx_desc_pkt_len(pdesc);
+ status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
RX_DRV_INFO_SIZE_UNIT;
- status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
- status->icv = (u16)GET_RX_DESC_ICV(pdesc);
- status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
+ status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
+ status->icv = (u16)get_rx_desc_icv(pdesc);
+ status->crc = (u16)get_rx_desc_crc32(pdesc);
status->hwerror = (status->crc | status->icv);
- status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
- status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
- status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
- status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
+ status->decrypted = !get_rx_desc_swdec(pdesc);
+ status->rate = (u8)get_rx_desc_rxmcs(pdesc);
+ status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
+ status->timestamp_low = get_rx_desc_tsfl(pdesc);
status->is_cck = RTL92EE_RX_HAL_IS_CCK_RATE(status->rate);
- status->macid = GET_RX_DESC_MACID(pdesc);
- if (GET_RX_STATUS_DESC_PATTERN_MATCH(pdesc))
+ status->macid = get_rx_desc_macid(pdesc);
+ if (get_rx_status_desc_pattern_match(pdesc))
wake_match = BIT(2);
- else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
+ else if (get_rx_status_desc_magic_match(pdesc))
wake_match = BIT(1);
- else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
+ else if (get_rx_status_desc_unicast_match(pdesc))
wake_match = BIT(0);
else
wake_match = 0;
@@ -415,9 +415,9 @@ bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
rx_status->signal = status->recvsignalpower + 10;
if (status->packet_report_type == TX_REPORT2) {
status->macid_valid_entry[0] =
- GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
+ get_rx_rpt2_desc_macid_valid_1(pdesc);
status->macid_valid_entry[1] =
- GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
+ get_rx_rpt2_desc_macid_valid_2(pdesc);
}
return true;
}
@@ -434,17 +434,17 @@ void rtl92ee_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc,
if (header_desc == NULL)
return;
- total_len = (u16)GET_RX_BUFFER_DESC_TOTAL_LENGTH(header_desc);
+ total_len = (u16)get_rx_buffer_desc_total_length(header_desc);
- first_seg = (u8)GET_RX_BUFFER_DESC_FS(header_desc);
+ first_seg = (u8)get_rx_buffer_desc_fs(header_desc);
- last_seg = (u8)GET_RX_BUFFER_DESC_LS(header_desc);
+ last_seg = (u8)get_rx_buffer_desc_ls(header_desc);
while (total_len == 0 && first_seg == 0 && last_seg == 0) {
read_cnt++;
- total_len = (u16)GET_RX_BUFFER_DESC_TOTAL_LENGTH(header_desc);
- first_seg = (u8)GET_RX_BUFFER_DESC_FS(header_desc);
- last_seg = (u8)GET_RX_BUFFER_DESC_LS(header_desc);
+ total_len = (u16)get_rx_buffer_desc_total_length(header_desc);
+ first_seg = (u8)get_rx_buffer_desc_fs(header_desc);
+ last_seg = (u8)get_rx_buffer_desc_ls(header_desc);
if (read_cnt > 20)
break;
@@ -589,15 +589,15 @@ void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
(current_bd_desc * TX_DESC_SIZE);
/* Reset */
- SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, 0);
- SET_TX_BUFF_DESC_PSB(tx_bd_desc, 0);
- SET_TX_BUFF_DESC_OWN(tx_bd_desc, 0);
+ set_tx_buff_desc_len_0(tx_bd_desc, 0);
+ set_tx_buff_desc_psb(tx_bd_desc, 0);
+ set_tx_buff_desc_own(tx_bd_desc, 0);
for (i = 1; i < segmentnum; i++) {
- SET_TXBUFFER_DESC_LEN_WITH_OFFSET(tx_bd_desc, i, 0);
- SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(tx_bd_desc, i, 0);
- SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(tx_bd_desc, i, 0);
- SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(tx_bd_desc, i, 0, dma64);
+ set_txbuffer_desc_len_with_offset(tx_bd_desc, i, 0);
+ set_txbuffer_desc_amsdu_with_offset(tx_bd_desc, i, 0);
+ set_txbuffer_desc_add_low_with_offset(tx_bd_desc, i, 0);
+ set_txbuffer_desc_add_high_with_offset(tx_bd_desc, i, 0, dma64);
}
/* Clear all status */
@@ -606,27 +606,27 @@ void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
if (rtlpriv->rtlhal.earlymode_enable) {
if (queue_index < BEACON_QUEUE) {
/* This if needs braces */
- SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size + 8);
+ set_tx_buff_desc_len_0(tx_bd_desc, desc_size + 8);
} else {
- SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size);
+ set_tx_buff_desc_len_0(tx_bd_desc, desc_size);
}
} else {
- SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size);
+ set_tx_buff_desc_len_0(tx_bd_desc, desc_size);
}
- SET_TX_BUFF_DESC_PSB(tx_bd_desc, psblen);
- SET_TX_BUFF_DESC_ADDR_LOW_0(tx_bd_desc, desc_dma_addr);
- SET_TX_BUFF_DESC_ADDR_HIGH_0(tx_bd_desc, ((u64)desc_dma_addr >> 32),
+ set_tx_buff_desc_psb(tx_bd_desc, psblen);
+ set_tx_buff_desc_addr_low_0(tx_bd_desc, desc_dma_addr);
+ set_tx_buff_desc_addr_high_0(tx_bd_desc, ((u64)desc_dma_addr >> 32),
dma64);
- SET_TXBUFFER_DESC_LEN_WITH_OFFSET(tx_bd_desc, 1, pkt_len);
+ set_txbuffer_desc_len_with_offset(tx_bd_desc, 1, pkt_len);
/* don't using extendsion mode. */
- SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(tx_bd_desc, 1, 0);
- SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(tx_bd_desc, 1, addr);
- SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(tx_bd_desc, 1,
+ set_txbuffer_desc_amsdu_with_offset(tx_bd_desc, 1, 0);
+ set_txbuffer_desc_add_low_with_offset(tx_bd_desc, 1, addr);
+ set_txbuffer_desc_add_high_with_offset(tx_bd_desc, 1,
((u64)addr >> 32), dma64);
- SET_TX_DESC_PKT_SIZE(desc, (u16)(pkt_len));
- SET_TX_DESC_TX_BUFFER_SIZE(desc, (u16)(pkt_len));
+ set_tx_desc_pkt_size(desc, (u16)(pkt_len));
+ set_tx_desc_tx_buffer_size(desc, (u16)(pkt_len));
}
void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
@@ -689,8 +689,8 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
}
if (firstseg) {
if (rtlhal->earlymode_enable) {
- SET_TX_DESC_PKT_OFFSET(pdesc, 1);
- SET_TX_DESC_OFFSET(pdesc,
+ set_tx_desc_pkt_offset(pdesc, 1);
+ set_tx_desc_offset(pdesc,
USB_HWDESC_HEADER_LEN + EM_HDR_LEN);
if (ptcb_desc->empkt_num) {
RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
@@ -700,18 +700,18 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
(u8 *)(skb->data));
}
} else {
- SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
+ set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
}
- SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
+ set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
if (ieee80211_is_mgmt(fc)) {
ptcb_desc->use_driver_rate = true;
} else {
if (rtlpriv->ra.is_special_data) {
ptcb_desc->use_driver_rate = true;
- SET_TX_DESC_TX_RATE(pdesc, DESC_RATE11M);
+ set_tx_desc_tx_rate(pdesc, DESC_RATE11M);
} else {
ptcb_desc->use_driver_rate = false;
}
@@ -723,46 +723,46 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
if (info->flags & IEEE80211_TX_CTL_AMPDU) {
- SET_TX_DESC_AGG_ENABLE(pdesc, 1);
- SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
+ set_tx_desc_agg_enable(pdesc, 1);
+ set_tx_desc_max_agg_num(pdesc, 0x14);
}
- SET_TX_DESC_SEQ(pdesc, seq_number);
- SET_TX_DESC_RTS_ENABLE(pdesc,
+ set_tx_desc_seq(pdesc, seq_number);
+ set_tx_desc_rts_enable(pdesc,
((ptcb_desc->rts_enable &&
!ptcb_desc->cts_enable) ? 1 : 0));
- SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
- SET_TX_DESC_CTS2SELF(pdesc,
+ set_tx_desc_hw_rts_enable(pdesc, 0);
+ set_tx_desc_cts2self(pdesc,
((ptcb_desc->cts_enable) ? 1 : 0));
- SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
- SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
- SET_TX_DESC_RTS_SHORT(pdesc,
+ set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
+ set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
+ set_tx_desc_rts_short(pdesc,
((ptcb_desc->rts_rate <= DESC_RATE54M) ?
(ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
(ptcb_desc->rts_use_shortgi ? 1 : 0)));
if (ptcb_desc->tx_enable_sw_calc_duration)
- SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
+ set_tx_desc_nav_use_hdr(pdesc, 1);
if (bw_40) {
if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
- SET_TX_DESC_DATA_BW(pdesc, 1);
- SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
+ set_tx_desc_data_bw(pdesc, 1);
+ set_tx_desc_tx_sub_carrier(pdesc, 3);
} else {
- SET_TX_DESC_DATA_BW(pdesc, 0);
- SET_TX_DESC_TX_SUB_CARRIER(pdesc,
+ set_tx_desc_data_bw(pdesc, 0);
+ set_tx_desc_tx_sub_carrier(pdesc,
mac->cur_40_prime_sc);
}
} else {
- SET_TX_DESC_DATA_BW(pdesc, 0);
- SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
+ set_tx_desc_data_bw(pdesc, 0);
+ set_tx_desc_tx_sub_carrier(pdesc, 0);
}
- SET_TX_DESC_LINIP(pdesc, 0);
+ set_tx_desc_linip(pdesc, 0);
if (sta) {
u8 ampdu_density = sta->ht_cap.ampdu_density;
- SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
+ set_tx_desc_ampdu_density(pdesc, ampdu_density);
}
if (info->control.hw_key) {
struct ieee80211_key_conf *key = info->control.hw_key;
@@ -771,59 +771,59 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
case WLAN_CIPHER_SUITE_WEP40:
case WLAN_CIPHER_SUITE_WEP104:
case WLAN_CIPHER_SUITE_TKIP:
- SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
+ set_tx_desc_sec_type(pdesc, 0x1);
break;
case WLAN_CIPHER_SUITE_CCMP:
- SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
+ set_tx_desc_sec_type(pdesc, 0x3);
break;
default:
- SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
+ set_tx_desc_sec_type(pdesc, 0x0);
break;
}
}
- SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
- SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
- SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
- SET_TX_DESC_DISABLE_FB(pdesc,
+ set_tx_desc_queue_sel(pdesc, fw_qsel);
+ set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
+ set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
+ set_tx_desc_disable_fb(pdesc,
ptcb_desc->disable_ratefallback ? 1 : 0);
- SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
+ set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
- /*SET_TX_DESC_PWR_STATUS(pdesc, pwr_status);*/
+ /*set_tx_desc_pwr_status(pdesc, pwr_status);*/
/* Set TxRate and RTSRate in TxDesc */
/* This prevent Tx initial rate of new-coming packets */
/* from being overwritten by retried packet rate.*/
if (!ptcb_desc->use_driver_rate) {
- /*SET_TX_DESC_RTS_RATE(pdesc, 0x08); */
- /* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */
+ /*set_tx_desc_rts_rate(pdesc, 0x08); */
+ /* set_tx_desc_tx_rate(pdesc, 0x0b); */
}
if (ieee80211_is_data_qos(fc)) {
if (mac->rdg_en) {
RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
"Enable RDG function.\n");
- SET_TX_DESC_RDG_ENABLE(pdesc, 1);
- SET_TX_DESC_HTC(pdesc, 1);
+ set_tx_desc_rdg_enable(pdesc, 1);
+ set_tx_desc_htc(pdesc, 1);
}
}
/* tx report */
rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info);
}
- SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
- SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
- SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
+ set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
+ set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
+ set_tx_desc_tx_buffer_address(pdesc, mapping);
if (rtlpriv->dm.useramask) {
- SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
- SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
+ set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
+ set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
} else {
- SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
- SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
+ set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
+ set_tx_desc_macid(pdesc, ptcb_desc->ratr_index);
}
- SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
+ set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
- SET_TX_DESC_BMC(pdesc, 1);
+ set_tx_desc_bmc(pdesc, 1);
}
RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
}
@@ -848,36 +848,36 @@ void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
CLEAR_PCI_TX_DESC_CONTENT(pdesc, txdesc_len);
if (firstseg)
- SET_TX_DESC_OFFSET(pdesc, txdesc_len);
+ set_tx_desc_offset(pdesc, txdesc_len);
- SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M);
+ set_tx_desc_tx_rate(pdesc, DESC_RATE1M);
- SET_TX_DESC_SEQ(pdesc, 0);
+ set_tx_desc_seq(pdesc, 0);
- SET_TX_DESC_LINIP(pdesc, 0);
+ set_tx_desc_linip(pdesc, 0);
- SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
+ set_tx_desc_queue_sel(pdesc, fw_queue);
- SET_TX_DESC_FIRST_SEG(pdesc, 1);
- SET_TX_DESC_LAST_SEG(pdesc, 1);
+ set_tx_desc_first_seg(pdesc, 1);
+ set_tx_desc_last_seg(pdesc, 1);
- SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
+ set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
- SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
+ set_tx_desc_tx_buffer_address(pdesc, mapping);
- SET_TX_DESC_RATE_ID(pdesc, 7);
- SET_TX_DESC_MACID(pdesc, 0);
+ set_tx_desc_rate_id(pdesc, 7);
+ set_tx_desc_macid(pdesc, 0);
- SET_TX_DESC_OWN(pdesc, 1);
+ set_tx_desc_own(pdesc, 1);
- SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
+ set_tx_desc_pkt_size((u8 *)pdesc, (u16)(skb->len));
- SET_TX_DESC_FIRST_SEG(pdesc, 1);
- SET_TX_DESC_LAST_SEG(pdesc, 1);
+ set_tx_desc_first_seg(pdesc, 1);
+ set_tx_desc_last_seg(pdesc, 1);
- SET_TX_DESC_OFFSET(pdesc, 40);
+ set_tx_desc_offset(pdesc, 40);
- SET_TX_DESC_USE_RATE(pdesc, 1);
+ set_tx_desc_use_rate(pdesc, 1);
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
"H2C Tx Cmd Content\n", pdesc, txdesc_len);
@@ -893,7 +893,7 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
if (istx) {
switch (desc_name) {
case HW_DESC_TX_NEXTDESC_ADDR:
- SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
+ set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
break;
case HW_DESC_OWN:{
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -903,7 +903,7 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
if (q_idx == BEACON_QUEUE) {
ring->cur_tx_wp = 0;
ring->cur_tx_rp = 0;
- SET_TX_BUFF_DESC_OWN(pdesc, 1);
+ set_tx_buff_desc_own(pdesc, 1);
return;
}
@@ -919,23 +919,23 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
} else {
switch (desc_name) {
case HW_DESC_RX_PREPARE:
- SET_RX_BUFFER_DESC_LS(pdesc, 0);
- SET_RX_BUFFER_DESC_FS(pdesc, 0);
- SET_RX_BUFFER_DESC_TOTAL_LENGTH(pdesc, 0);
+ set_rx_buffer_desc_ls(pdesc, 0);
+ set_rx_buffer_desc_fs(pdesc, 0);
+ set_rx_buffer_desc_total_length(pdesc, 0);
- SET_RX_BUFFER_DESC_DATA_LENGTH(pdesc,
+ set_rx_buffer_desc_data_length(pdesc,
MAX_RECEIVE_BUFFER_SIZE +
RX_DESC_SIZE);
- SET_RX_BUFFER_PHYSICAL_LOW(pdesc, (*(dma_addr_t *)val) &
+ set_rx_buffer_physical_low(pdesc, (*(dma_addr_t *)val) &
DMA_BIT_MASK(32));
- SET_RX_BUFFER_PHYSICAL_HIGH(pdesc,
+ set_rx_buffer_physical_high(pdesc,
((u64)(*(dma_addr_t *)val)
>> 32),
dma64);
break;
case HW_DESC_RXERO:
- SET_RX_DESC_EOR(pdesc, 1);
+ set_rx_desc_eor(pdesc, 1);
break;
default:
WARN_ONCE(true,
@@ -956,11 +956,11 @@ u64 rtl92ee_get_desc(struct ieee80211_hw *hw,
if (istx) {
switch (desc_name) {
case HW_DESC_OWN:
- ret = GET_TX_DESC_OWN(pdesc);
+ ret = get_tx_desc_own(pdesc);
break;
case HW_DESC_TXBUFF_ADDR:
- ret = GET_TXBUFFER_DESC_ADDR_LOW(pdesc, 1);
- ret |= (u64)GET_TXBUFFER_DESC_ADDR_HIGH(pdesc, 1,
+ ret = get_txbuffer_desc_addr_low(pdesc, 1);
+ ret |= (u64)get_txbuffer_desc_addr_high(pdesc, 1,
dma64) << 32;
break;
default:
@@ -972,13 +972,13 @@ u64 rtl92ee_get_desc(struct ieee80211_hw *hw,
} else {
switch (desc_name) {
case HW_DESC_OWN:
- ret = GET_RX_DESC_OWN(pdesc);
+ ret = get_rx_desc_own(pdesc);
break;
case HW_DESC_RXPKT_LEN:
- ret = GET_RX_DESC_PKT_LEN(pdesc);
+ ret = get_rx_desc_pkt_len(pdesc);
break;
case HW_DESC_RXBUFF_ADDR:
- ret = GET_RX_DESC_BUFF_ADDR(pdesc);
+ ret = get_rx_desc_buff_addr(pdesc);
break;
default:
WARN_ONCE(true,
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
index 3b00072ba5d2..ffe8097e0ed2 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
@@ -14,219 +14,462 @@
#define RX_DESC_SIZE 24
#define MAX_RECEIVE_BUFFER_SIZE 8192
-#define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(15, 0))
-#define SET_TX_DESC_OFFSET(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(23, 16))
-#define SET_TX_DESC_BMC(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(24))
-#define SET_TX_DESC_HTC(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(25))
-#define SET_TX_DESC_LAST_SEG(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(26))
-#define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(27))
-#define SET_TX_DESC_LINIP(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(28))
-#define SET_TX_DESC_OWN(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31))
-
-#define GET_TX_DESC_OWN(__pdesc) \
- le32_get_bits(*((__le32 *)__pdesc), BIT(31))
-
-#define SET_TX_DESC_MACID(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(6, 0))
-#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(12, 8))
-#define SET_TX_DESC_RATE_ID(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(20, 16))
-#define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(23, 22))
-#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(28, 24))
-
-#define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(12))
-#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(13))
-#define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(17))
-#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, GENMASK(22, 20))
-
-#define SET_TX_DESC_USE_RATE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(8))
-#define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(10))
-#define SET_TX_DESC_CTS2SELF(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(11))
-#define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(12))
-#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(13))
-#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(15))
-#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, GENMASK(21, 17))
+static inline void set_tx_desc_pkt_size(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(15, 0));
+}
+
+static inline void set_tx_desc_offset(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(23, 16));
+}
+
+static inline void set_tx_desc_bmc(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(24));
+}
+
+static inline void set_tx_desc_htc(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(25));
+}
+
+static inline void set_tx_desc_last_seg(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(26));
+}
+
+static inline void set_tx_desc_first_seg(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(27));
+}
+
+static inline void set_tx_desc_linip(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(28));
+}
+
+static inline void set_tx_desc_own(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31));
+}
+
+static inline int get_tx_desc_own(u8 *__pdesc)
+{
+ return le32_get_bits(*((__le32 *)__pdesc), BIT(31));
+}
+
+static inline void set_tx_desc_macid(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(6, 0));
+}
+
+static inline void set_tx_desc_queue_sel(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(12, 8));
+}
+
+static inline void set_tx_desc_rate_id(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(20, 16));
+}
+
+static inline void set_tx_desc_sec_type(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(23, 22));
+}
+
+static inline void set_tx_desc_pkt_offset(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(28, 24));
+}
+
+static inline void set_tx_desc_agg_enable(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(12));
+}
+
+static inline void set_tx_desc_rdg_enable(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(13));
+}
+
+static inline void set_tx_desc_more_frag(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(17));
+}
+
+static inline void set_tx_desc_ampdu_density(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 8), __val, GENMASK(22, 20));
+}
+
+static inline void set_tx_desc_use_rate(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(8));
+}
+
+static inline void set_tx_desc_disable_fb(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(10));
+}
+
+static inline void set_tx_desc_cts2self(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(11));
+}
+
+static inline void set_tx_desc_rts_enable(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(12));
+}
+
+static inline void set_tx_desc_hw_rts_enable(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(13));
+}
+
+static inline void set_tx_desc_nav_use_hdr(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(15));
+}
+
+static inline void set_tx_desc_max_agg_num(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 12), __val, GENMASK(21, 17));
+}
/* Dword 4 */
-#define SET_TX_DESC_TX_RATE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(6, 0))
-#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(12, 8))
-#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(16, 13))
-#define SET_TX_DESC_RTS_RATE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(28, 24))
+static inline void set_tx_desc_tx_rate(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(6, 0));
+}
+
+static inline void set_tx_desc_data_rate_fb_limit(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(12, 8));
+}
+
+static inline void set_tx_desc_rts_rate_fb_limit(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(16, 13));
+}
+
+static inline void set_tx_desc_rts_rate(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(28, 24));
+}
/* Dword 5 */
-#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(3, 0))
-#define SET_TX_DESC_DATA_BW(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(6, 5))
-#define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, BIT(12))
-#define SET_TX_DESC_RTS_SC(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(16, 13))
+static inline void set_tx_desc_tx_sub_carrier(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(3, 0));
+}
+
+static inline void set_tx_desc_data_bw(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(6, 5));
+}
+
+static inline void set_tx_desc_rts_short(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, BIT(12));
+}
+
+static inline void set_tx_desc_rts_sc(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(16, 13));
+}
/* Dword 7 */
-#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 28), __val, GENMASK(15, 0))
+static inline void set_tx_desc_tx_buffer_size(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 28), __val, GENMASK(15, 0));
+}
/* Dword 9 */
-#define SET_TX_DESC_SEQ(__pdesc, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 36), __val, GENMASK(23, 12))
+static inline void set_tx_desc_seq(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 36), __val, GENMASK(23, 12));
+}
/* Dword 10 */
-#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \
- *(__le32 *)(__pdesc + 40) = cpu_to_le32(__val)
+static inline void set_tx_desc_tx_buffer_address(u8 *__pdesc, u32 __val)
+{
+ *(__le32 *)(__pdesc + 40) = cpu_to_le32(__val);
+}
/* Dword 11*/
-#define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \
- *(__le32 *)(__pdesc + 48) = cpu_to_le32(__val)
-
-#define SET_EARLYMODE_PKTNUM(__paddr, __val) \
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(3, 0))
-#define SET_EARLYMODE_LEN0(__paddr, __val) \
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(18, 4))
-#define SET_EARLYMODE_LEN1(__paddr, __val) \
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(17, 16))
-#define SET_EARLYMODE_LEN2_1(__paddr, __val) \
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(5, 2))
-#define SET_EARLYMODE_LEN2_2(__paddr, __val) \
- le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(7, 0))
-#define SET_EARLYMODE_LEN3(__paddr, __val) \
- le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 17))
-#define SET_EARLYMODE_LEN4(__paddr, __val) \
- le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 20))
+static inline void set_tx_desc_next_desc_address(u8 *__pdesc, u32 __val)
+{
+ *(__le32 *)(__pdesc + 48) = cpu_to_le32(__val);
+}
+
+static inline void set_earlymode_pktnum(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(3, 0));
+}
+
+static inline void set_earlymode_len0(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(18, 4));
+}
+
+static inline void set_earlymode_len1(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(17, 16));
+}
+
+static inline void set_earlymode_len2_1(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(5, 2));
+}
+
+static inline void set_earlymode_len2_2(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(7, 0));
+}
+
+static inline void set_earlymode_len3(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 17));
+}
+
+static inline void set_earlymode_len4(u8 *__paddr, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 20));
+}
/* TX/RX buffer descriptor */
/* for Txfilldescroptor92ee, fill the desc content. */
-#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pdesc, __offset, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val, \
- GENMASK(15, 0))
-#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pdesc, __offset, __val) \
- le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val, BIT(31))
-#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pdesc, __offset, __val) \
- *(__le32 *)(__pdesc + 16 * __offset + 4) = cpu_to_le32(__val)
-#define SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(pbd, off, val, dma64) \
- *(__le32 *)(pbd + 16 * off + 8) = dma64 ? cpu_to_le32(val) : 0
-#define GET_TXBUFFER_DESC_ADDR_LOW(__pdesc, __offset) \
- le32_to_cpu(*((__le32 *)(__pdesc + 16 * __offset + 4)))
-#define GET_TXBUFFER_DESC_ADDR_HIGH(pbd, off, dma64) \
- (dma64 ? le32_to_cpu(*((__le32 *)(pbd + 16 * off + 8))) : 0)
+static inline void set_txbuffer_desc_len_with_offset(u8 *__pdesc,
+ u8 __offset, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val,
+ GENMASK(15, 0));
+}
+
+static inline void set_txbuffer_desc_amsdu_with_offset(u8 *__pdesc,
+ u8 __offset, u32 __val)
+{
+ le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val, BIT(31));
+}
+
+static inline void set_txbuffer_desc_add_low_with_offset(u8 *__pdesc,
+ u8 __offset,
+ u32 __val)
+{
+ *(__le32 *)(__pdesc + 16 * __offset + 4) = cpu_to_le32(__val);
+}
+
+static inline void set_txbuffer_desc_add_high_with_offset(u8 *pbd, u8 off,
+ u32 val, bool dma64)
+{
+ if (dma64)
+ *(__le32 *)(pbd + 16 * off + 8) = cpu_to_le32(val);
+ else
+ *(__le32 *)(pbd + 16 * off + 8) = 0;
+}
+
+static inline u32 get_txbuffer_desc_addr_low(u8 *__pdesc, u8 __offset)
+{
+ return le32_to_cpu(*((__le32 *)(__pdesc + 16 * __offset + 4)));
+}
+
+static inline u32 get_txbuffer_desc_addr_high(u8 *pbd, u32 off, bool dma64)
+{
+ if (dma64)
+ return le32_to_cpu(*((__le32 *)(pbd + 16 * off + 8)));
+ return 0;
+}
/* Dword 0 */
-#define SET_TX_BUFF_DESC_LEN_0(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(13, 0))
-#define SET_TX_BUFF_DESC_PSB(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(30, 16))
-#define SET_TX_BUFF_DESC_OWN(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31))
+static inline void set_tx_buff_desc_len_0(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(13, 0));
+}
+
+static inline void set_tx_buff_desc_psb(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(30, 16));
+}
+
+static inline void set_tx_buff_desc_own(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31));
+}
/* Dword 1 */
-#define SET_TX_BUFF_DESC_ADDR_LOW_0(__pdesc, __val) \
- *(__le32 *)(__pdesc + 4) = cpu_to_le32(__val)
+static inline void set_tx_buff_desc_addr_low_0(u8 *__pdesc, u32 __val)
+{
+ *(__le32 *)(__pdesc + 4) = cpu_to_le32(__val);
+}
+
/* Dword 2 */
-#define SET_TX_BUFF_DESC_ADDR_HIGH_0(bdesc, val, dma64) \
- SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(bdesc, 0, val, dma64)
+static inline void set_tx_buff_desc_addr_high_0(u8 *pdesc, u32 val, bool dma64)
+{
+ if (dma64)
+ *(__le32 *)(pdesc + 8) = cpu_to_le32(val);
+ else
+ *(__le32 *)(pdesc + 8) = 0;
+}
/* RX buffer */
/* DWORD 0 */
-#define SET_RX_BUFFER_DESC_DATA_LENGTH(__status, __val) \
- le32p_replace_bits((__le32 *)__status, __val, GENMASK(13, 0))
-#define SET_RX_BUFFER_DESC_LS(__status, __val) \
- le32p_replace_bits((__le32 *)__status, __val, BIT(15))
-#define SET_RX_BUFFER_DESC_FS(__status, __val) \
- le32p_replace_bits((__le32 *)__status, __val, BIT(16))
-#define SET_RX_BUFFER_DESC_TOTAL_LENGTH(__status, __val) \
- le32p_replace_bits((__le32 *)__status, __val, GENMASK(30, 16))
-
-#define GET_RX_BUFFER_DESC_LS(__status) \
- le32_get_bits(*((__le32 *)__status), BIT(15))
-#define GET_RX_BUFFER_DESC_FS(__status) \
- le32_get_bits(*((__le32 *)__status), BIT(16))
-#define GET_RX_BUFFER_DESC_TOTAL_LENGTH(__status) \
- le32_get_bits(*((__le32 *)__status), GENMASK(30, 16))
+static inline void set_rx_buffer_desc_data_length(u8 *__status, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__status, __val, GENMASK(13, 0));
+}
+
+static inline void set_rx_buffer_desc_ls(u8 *__status, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__status, __val, BIT(15));
+}
+
+static inline void set_rx_buffer_desc_fs(u8 *__status, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__status, __val, BIT(16));
+}
+
+static inline void set_rx_buffer_desc_total_length(u8 *__status, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__status, __val, GENMASK(30, 16));
+}
+
+static inline int get_rx_buffer_desc_ls(u8 *__status)
+{
+ return le32_get_bits(*((__le32 *)__status), BIT(15));
+}
+
+static inline int get_rx_buffer_desc_fs(u8 *__status)
+{
+ return le32_get_bits(*((__le32 *)__status), BIT(16));
+}
+
+static inline int get_rx_buffer_desc_total_length(u8 *__status)
+{
+ return le32_get_bits(*((__le32 *)__status), GENMASK(30, 16));
+}
/* DWORD 1 */
-#define SET_RX_BUFFER_PHYSICAL_LOW(__status, __val) \
- *(__le32 *)(__status + 4) = cpu_to_le32(__val)
+static inline void set_rx_buffer_physical_low(u8 *__status, u32 __val)
+{
+ *(__le32 *)(__status + 4) = cpu_to_le32(__val);
+}
/* DWORD 2 */
-#define SET_RX_BUFFER_PHYSICAL_HIGH(__rx_status_desc, __val, dma64) \
- *(__le32 *)(__rx_status_desc + 8) = (dma64 ? cpu_to_le32(__val) : 0)
-
-#define GET_RX_DESC_PKT_LEN(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, GENMASK(13, 0))
-#define GET_RX_DESC_CRC32(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, BIT(14))
-#define GET_RX_DESC_ICV(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, BIT(15))
-#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, GENMASK(19, 16))
-#define GET_RX_DESC_SHIFT(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, GENMASK(25, 24))
-#define GET_RX_DESC_PHYST(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, BIT(26))
-#define GET_RX_DESC_SWDEC(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, BIT(27))
-#define GET_RX_DESC_OWN(__pdesc) \
- le32_get_bits(*(__le32 *)__pdesc, BIT(31))
-
-#define SET_RX_DESC_EOR(__pdesc, __val) \
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(30))
-
-#define GET_RX_DESC_MACID(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 4), GENMASK(6, 0))
-#define GET_RX_DESC_PAGGR(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 4), BIT(15))
-#define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 8), BIT(28))
-
-#define GET_RX_DESC_RXMCS(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 12), GENMASK(6, 0))
-#define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(29))
-#define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(30))
-#define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc) \
- le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(31))
-
-#define GET_RX_DESC_TSFL(__pdesc) \
- le32_to_cpu(*((__le32 *)(__pdesc + 20)))
-
-#define GET_RX_DESC_BUFF_ADDR(__pdesc) \
- le32_to_cpu(*((__le32 *)(__pdesc + 24)))
+static inline void set_rx_buffer_physical_high(u8 *__rx_status_desc, u32 __val,
+ bool dma64)
+{
+ if (dma64)
+ *(__le32 *)(__rx_status_desc + 8) = cpu_to_le32(__val);
+ else
+ *(__le32 *)(__rx_status_desc + 8) = 0;
+}
+
+static inline int get_rx_desc_pkt_len(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, GENMASK(13, 0));
+}
+
+static inline int get_rx_desc_crc32(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, BIT(14));
+}
+
+static inline int get_rx_desc_icv(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, BIT(15));
+}
+
+static inline int get_rx_desc_drv_info_size(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, GENMASK(19, 16));
+}
+
+static inline int get_rx_desc_shift(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, GENMASK(25, 24));
+}
+
+static inline int get_rx_desc_physt(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, BIT(26));
+}
+
+static inline int get_rx_desc_swdec(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, BIT(27));
+}
+
+static inline int get_rx_desc_own(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)__pdesc, BIT(31));
+}
+
+static inline void set_rx_desc_eor(u8 *__pdesc, u32 __val)
+{
+ le32p_replace_bits((__le32 *)__pdesc, __val, BIT(30));
+}
+
+static inline int get_rx_desc_macid(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 4), GENMASK(6, 0));
+}
+
+static inline int get_rx_desc_paggr(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 4), BIT(15));
+}
+
+static inline int get_rx_status_desc_rpt_sel(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 8), BIT(28));
+}
+
+static inline int get_rx_desc_rxmcs(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 12), GENMASK(6, 0));
+}
+
+static inline int get_rx_status_desc_pattern_match(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(29));
+}
+
+static inline int get_rx_status_desc_unicast_match(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(30));
+}
+
+static inline int get_rx_status_desc_magic_match(u8 *__pdesc)
+{
+ return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(31));
+}
+
+static inline u32 get_rx_desc_tsfl(u8 *__pdesc)
+{
+ return le32_to_cpu(*((__le32 *)(__pdesc + 20)));
+}
+
+static inline u32 get_rx_desc_buff_addr(u8 *__pdesc)
+{
+ return le32_to_cpu(*((__le32 *)(__pdesc + 24)));
+}
/* TX report 2 format in Rx desc*/
-#define GET_RX_RPT2_DESC_MACID_VALID_1(__status) \
- le32_to_cpu(*((__le32 *)(__status + 16)))
-#define GET_RX_RPT2_DESC_MACID_VALID_2(__status) \
- le32_to_cpu(*((__le32 *)(__status + 20)))
+static inline u32 get_rx_rpt2_desc_macid_valid_1(u8 *__status)
+{
+ return le32_to_cpu(*((__le32 *)(__status + 16)));
+}
+
+static inline u32 get_rx_rpt2_desc_macid_valid_2(u8 *__status)
+{
+ return le32_to_cpu(*((__le32 *)(__status + 20)));
+}
#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
do { \
--
2.16.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/5] rtlwifi: rtl8192ee: Convert inline routines to little-endian words
2019-08-31 18:06 [PATCH 0/5] rtlwifi: rtl8192ee: Replace local TX and RX bit manipulation macros Larry Finger
` (2 preceding siblings ...)
2019-08-31 18:06 ` [PATCH 3/5] rtlwifi: rtl8192ee: Convert macros that set descriptor Larry Finger
@ 2019-08-31 18:06 ` Larry Finger
2019-08-31 18:06 ` [PATCH 5/5] rtlwifi: rtl8192ee: Remove some variable initializations Larry Finger
4 siblings, 0 replies; 7+ messages in thread
From: Larry Finger @ 2019-08-31 18:06 UTC (permalink / raw)
To: kvalo; +Cc: linux-wireless, pkshih, Larry Finger
In this step, the read/write routines for the descriptors are converted
to use __le32 quantities, thus a lot of casts can be removed. Callback
routines still use the 8-bit arrays, but these are changed within the
specified routine.
The macro that cleared a descriptor has now been converted into an inline
routine.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
---
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.c | 38 ++-
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.h | 359 +++++++++++----------
2 files changed, 203 insertions(+), 194 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
index dedd1cc8c369..0706888fe3de 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
@@ -271,9 +271,10 @@ static void _rtl92ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
}
static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
- u8 *virtualaddress)
+ u8 *virtualaddress8)
{
u32 dwtmp = 0;
+ __le32 *virtualaddress = (__le32 *)virtualaddress8;
memset(virtualaddress, 0, 8);
@@ -325,11 +326,12 @@ static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
struct rtl_stats *status,
struct ieee80211_rx_status *rx_status,
- u8 *pdesc, struct sk_buff *skb)
+ u8 *pdesc8, struct sk_buff *skb)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rx_fwinfo *p_drvinfo;
struct ieee80211_hdr *hdr;
+ __le32 *pdesc = (__le32 *)pdesc8;
u32 phystatus = get_rx_desc_physt(pdesc);
u8 wake_match;
@@ -409,7 +411,7 @@ bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
p_drvinfo = (struct rx_fwinfo *)(skb->data +
status->rx_bufshift + 24);
- _rtl92ee_translate_rx_signal_stuff(hw, skb, status, pdesc,
+ _rtl92ee_translate_rx_signal_stuff(hw, skb, status, pdesc8,
p_drvinfo);
}
rx_status->signal = status->recvsignalpower + 10;
@@ -423,13 +425,14 @@ bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
}
/*in Windows, this == Rx_92EE_Interrupt*/
-void rtl92ee_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc,
+void rtl92ee_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc8,
u8 queue_index)
{
u8 first_seg = 0;
u8 last_seg = 0;
u16 total_len = 0;
u16 read_cnt = 0;
+ __le32 *header_desc = (__le32 *)header_desc8;
if (header_desc == NULL)
return;
@@ -546,7 +549,7 @@ u16 rtl92ee_get_available_desc(struct ieee80211_hw *hw, u8 q_idx)
}
void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
- u8 *tx_bd_desc, u8 *desc, u8 queue_index,
+ u8 *tx_bd_desc8, u8 *desc8, u8 queue_index,
struct sk_buff *skb, dma_addr_t addr)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -563,6 +566,8 @@ void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
u8 segmentnum = 1 << (RTL8192EE_SEG_NUM + 1);
dma_addr_t desc_dma_addr;
bool dma64 = rtlpriv->cfg->mod_params->dma64;
+ __le32 *desc = (__le32 *)desc8;
+ __le32 *tx_bd_desc = (__le32 *)tx_bd_desc8;
tx_page_size = 2;
current_bd_desc = rtlpci->tx_ring[queue_index].cur_tx_wp;
@@ -601,7 +606,7 @@ void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
}
/* Clear all status */
- CLEAR_PCI_TX_DESC_CONTENT(desc, TX_DESC_SIZE);
+ clear_pci_tx_desc_content(desc, TX_DESC_SIZE);
if (rtlpriv->rtlhal.earlymode_enable) {
if (queue_index < BEACON_QUEUE) {
@@ -630,7 +635,7 @@ void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
}
void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
- struct ieee80211_hdr *hdr, u8 *pdesc_tx,
+ struct ieee80211_hdr *hdr, u8 *pdesc8,
u8 *pbd_desc_tx,
struct ieee80211_tx_info *info,
struct ieee80211_sta *sta,
@@ -642,7 +647,6 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
- u8 *pdesc = (u8 *)pdesc_tx;
u16 seq_number;
__le16 fc = hdr->frame_control;
unsigned int buf_len = 0;
@@ -654,6 +658,7 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
dma_addr_t mapping;
u8 bw_40 = 0;
u8 short_gi = 0;
+ __le32 *pdesc = (__le32 *)pdesc8;
if (mac->opmode == NL80211_IFTYPE_STATION) {
bw_40 = mac->bw_40;
@@ -680,7 +685,7 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
}
if (pbd_desc_tx != NULL)
- rtl92ee_pre_fill_tx_bd_desc(hw, pbd_desc_tx, pdesc, hw_queue,
+ rtl92ee_pre_fill_tx_bd_desc(hw, pbd_desc_tx, pdesc8, hw_queue,
skb, mapping);
if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
@@ -806,7 +811,7 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
}
}
/* tx report */
- rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info);
+ rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
}
set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
@@ -829,7 +834,7 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
}
void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
- u8 *pdesc, bool firstseg,
+ u8 *pdesc8, bool firstseg,
bool lastseg, struct sk_buff *skb)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -839,13 +844,14 @@ void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
skb->data, skb->len,
PCI_DMA_TODEVICE);
u8 txdesc_len = 40;
+ __le32 *pdesc = (__le32 *)pdesc8;
if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
"DMA mapping error\n");
return;
}
- CLEAR_PCI_TX_DESC_CONTENT(pdesc, txdesc_len);
+ clear_pci_tx_desc_content(pdesc, txdesc_len);
if (firstseg)
set_tx_desc_offset(pdesc, txdesc_len);
@@ -870,7 +876,7 @@ void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
set_tx_desc_own(pdesc, 1);
- set_tx_desc_pkt_size((u8 *)pdesc, (u16)(skb->len));
+ set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
set_tx_desc_first_seg(pdesc, 1);
set_tx_desc_last_seg(pdesc, 1);
@@ -883,12 +889,13 @@ void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
"H2C Tx Cmd Content\n", pdesc, txdesc_len);
}
-void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
+void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx,
u8 desc_name, u8 *val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 q_idx = *val;
bool dma64 = rtlpriv->cfg->mod_params->dma64;
+ __le32 *pdesc = (__le32 *)pdesc8;
if (istx) {
switch (desc_name) {
@@ -947,11 +954,12 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
}
u64 rtl92ee_get_desc(struct ieee80211_hw *hw,
- u8 *pdesc, bool istx, u8 desc_name)
+ u8 *pdesc8, bool istx, u8 desc_name)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u64 ret = 0;
bool dma64 = rtlpriv->cfg->mod_params->dma64;
+ __le32 *pdesc = (__le32 *)pdesc8;
if (istx) {
switch (desc_name) {
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
index ffe8097e0ed2..967cef3a9cbf 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h
@@ -14,470 +14,471 @@
#define RX_DESC_SIZE 24
#define MAX_RECEIVE_BUFFER_SIZE 8192
-static inline void set_tx_desc_pkt_size(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(15, 0));
+ le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));
}
-static inline void set_tx_desc_offset(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(23, 16));
+ le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));
}
-static inline void set_tx_desc_bmc(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_bmc(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(24));
+ le32p_replace_bits(__pdesc, __val, BIT(24));
}
-static inline void set_tx_desc_htc(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_htc(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(25));
+ le32p_replace_bits(__pdesc, __val, BIT(25));
}
-static inline void set_tx_desc_last_seg(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(26));
+ le32p_replace_bits(__pdesc, __val, BIT(26));
}
-static inline void set_tx_desc_first_seg(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(27));
+ le32p_replace_bits(__pdesc, __val, BIT(27));
}
-static inline void set_tx_desc_linip(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(28));
+ le32p_replace_bits(__pdesc, __val, BIT(28));
}
-static inline void set_tx_desc_own(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31));
+ le32p_replace_bits(__pdesc, __val, BIT(31));
}
-static inline int get_tx_desc_own(u8 *__pdesc)
+static inline int get_tx_desc_own(__le32 *__pdesc)
{
- return le32_get_bits(*((__le32 *)__pdesc), BIT(31));
+ return le32_get_bits(*(__pdesc), BIT(31));
}
-static inline void set_tx_desc_macid(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(6, 0));
+ le32p_replace_bits((__pdesc + 1), __val, GENMASK(6, 0));
}
-static inline void set_tx_desc_queue_sel(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(12, 8));
+ le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));
}
-static inline void set_tx_desc_rate_id(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(20, 16));
+ le32p_replace_bits((__pdesc + 1), __val, GENMASK(20, 16));
}
-static inline void set_tx_desc_sec_type(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(23, 22));
+ le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));
}
-static inline void set_tx_desc_pkt_offset(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_pkt_offset(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(28, 24));
+ le32p_replace_bits((__pdesc + 1), __val, GENMASK(28, 24));
}
-static inline void set_tx_desc_agg_enable(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_agg_enable(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(12));
+ le32p_replace_bits((__pdesc + 2), __val, BIT(12));
}
-static inline void set_tx_desc_rdg_enable(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(13));
+ le32p_replace_bits((__pdesc + 2), __val, BIT(13));
}
-static inline void set_tx_desc_more_frag(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(17));
+ le32p_replace_bits((__pdesc + 2), __val, BIT(17));
}
-static inline void set_tx_desc_ampdu_density(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 8), __val, GENMASK(22, 20));
+ le32p_replace_bits((__pdesc + 2), __val, GENMASK(22, 20));
}
-static inline void set_tx_desc_use_rate(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(8));
+ le32p_replace_bits((__pdesc + 3), __val, BIT(8));
}
-static inline void set_tx_desc_disable_fb(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(10));
+ le32p_replace_bits((__pdesc + 3), __val, BIT(10));
}
-static inline void set_tx_desc_cts2self(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(11));
+ le32p_replace_bits((__pdesc + 3), __val, BIT(11));
}
-static inline void set_tx_desc_rts_enable(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(12));
+ le32p_replace_bits((__pdesc + 3), __val, BIT(12));
}
-static inline void set_tx_desc_hw_rts_enable(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(13));
+ le32p_replace_bits((__pdesc + 3), __val, BIT(13));
}
-static inline void set_tx_desc_nav_use_hdr(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_nav_use_hdr(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, BIT(15));
+ le32p_replace_bits((__pdesc + 3), __val, BIT(15));
}
-static inline void set_tx_desc_max_agg_num(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 12), __val, GENMASK(21, 17));
+ le32p_replace_bits((__pdesc + 3), __val, GENMASK(21, 17));
}
/* Dword 4 */
-static inline void set_tx_desc_tx_rate(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(6, 0));
+ le32p_replace_bits((__pdesc + 4), __val, GENMASK(6, 0));
}
-static inline void set_tx_desc_data_rate_fb_limit(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(12, 8));
+ le32p_replace_bits((__pdesc + 4), __val, GENMASK(12, 8));
}
-static inline void set_tx_desc_rts_rate_fb_limit(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(16, 13));
+ le32p_replace_bits((__pdesc + 4), __val, GENMASK(16, 13));
}
-static inline void set_tx_desc_rts_rate(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(28, 24));
+ le32p_replace_bits((__pdesc + 4), __val, GENMASK(28, 24));
}
/* Dword 5 */
-static inline void set_tx_desc_tx_sub_carrier(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(3, 0));
+ le32p_replace_bits((__pdesc + 5), __val, GENMASK(3, 0));
}
-static inline void set_tx_desc_data_bw(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(6, 5));
+ le32p_replace_bits((__pdesc + 4), __val, GENMASK(6, 5));
}
-static inline void set_tx_desc_rts_short(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, BIT(12));
+ le32p_replace_bits((__pdesc + 5), __val, BIT(12));
}
-static inline void set_tx_desc_rts_sc(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(16, 13));
+ le32p_replace_bits((__pdesc + 5), __val, GENMASK(16, 13));
}
/* Dword 7 */
-static inline void set_tx_desc_tx_buffer_size(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 28), __val, GENMASK(15, 0));
+ le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));
}
/* Dword 9 */
-static inline void set_tx_desc_seq(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 36), __val, GENMASK(23, 12));
+ le32p_replace_bits((__pdesc + 9), __val, GENMASK(23, 12));
}
/* Dword 10 */
-static inline void set_tx_desc_tx_buffer_address(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)
{
- *(__le32 *)(__pdesc + 40) = cpu_to_le32(__val);
+ *(__pdesc + 10) = cpu_to_le32(__val);
}
/* Dword 11*/
-static inline void set_tx_desc_next_desc_address(u8 *__pdesc, u32 __val)
+static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)
{
- *(__le32 *)(__pdesc + 48) = cpu_to_le32(__val);
+ *(__pdesc + 12) = cpu_to_le32(__val);
}
-static inline void set_earlymode_pktnum(u8 *__paddr, u32 __val)
+static inline void set_earlymode_pktnum(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(3, 0));
+ le32p_replace_bits(__paddr, __val, GENMASK(3, 0));
}
-static inline void set_earlymode_len0(u8 *__paddr, u32 __val)
+static inline void set_earlymode_len0(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(18, 4));
+ le32p_replace_bits(__paddr, __val, GENMASK(18, 4));
}
-static inline void set_earlymode_len1(u8 *__paddr, u32 __val)
+static inline void set_earlymode_len1(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(17, 16));
+ le32p_replace_bits(__paddr, __val, GENMASK(17, 16));
}
-static inline void set_earlymode_len2_1(u8 *__paddr, u32 __val)
+static inline void set_earlymode_len2_1(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)__paddr, __val, GENMASK(5, 2));
+ le32p_replace_bits(__paddr, __val, GENMASK(5, 2));
}
-static inline void set_earlymode_len2_2(u8 *__paddr, u32 __val)
+static inline void set_earlymode_len2_2(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(7, 0));
+ le32p_replace_bits((__paddr + 1), __val, GENMASK(7, 0));
}
-static inline void set_earlymode_len3(u8 *__paddr, u32 __val)
+static inline void set_earlymode_len3(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 17));
+ le32p_replace_bits((__paddr + 1), __val, GENMASK(31, 17));
}
-static inline void set_earlymode_len4(u8 *__paddr, u32 __val)
+static inline void set_earlymode_len4(__le32 *__paddr, u32 __val)
{
- le32p_replace_bits((__le32 *)(__paddr + 4), __val, GENMASK(31, 20));
+ le32p_replace_bits((__paddr + 1), __val, GENMASK(31, 20));
}
/* TX/RX buffer descriptor */
/* for Txfilldescroptor92ee, fill the desc content. */
-static inline void set_txbuffer_desc_len_with_offset(u8 *__pdesc,
+static inline void set_txbuffer_desc_len_with_offset(__le32 *__pdesc,
u8 __offset, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val,
+ le32p_replace_bits((__pdesc + 4 * __offset), __val,
GENMASK(15, 0));
}
-static inline void set_txbuffer_desc_amsdu_with_offset(u8 *__pdesc,
+static inline void set_txbuffer_desc_amsdu_with_offset(__le32 *__pdesc,
u8 __offset, u32 __val)
{
- le32p_replace_bits((__le32 *)(__pdesc + 16 * __offset), __val, BIT(31));
+ le32p_replace_bits((__pdesc + 4 * __offset), __val, BIT(31));
}
-static inline void set_txbuffer_desc_add_low_with_offset(u8 *__pdesc,
+static inline void set_txbuffer_desc_add_low_with_offset(__le32 *__pdesc,
u8 __offset,
u32 __val)
{
- *(__le32 *)(__pdesc + 16 * __offset + 4) = cpu_to_le32(__val);
+ *(__pdesc + 4 * __offset + 1) = cpu_to_le32(__val);
}
-static inline void set_txbuffer_desc_add_high_with_offset(u8 *pbd, u8 off,
+static inline void set_txbuffer_desc_add_high_with_offset(__le32 *pbd, u8 off,
u32 val, bool dma64)
{
if (dma64)
- *(__le32 *)(pbd + 16 * off + 8) = cpu_to_le32(val);
+ *(pbd + 4 * off + 2) = cpu_to_le32(val);
else
- *(__le32 *)(pbd + 16 * off + 8) = 0;
+ *(pbd + 4 * off + 2) = 0;
}
-static inline u32 get_txbuffer_desc_addr_low(u8 *__pdesc, u8 __offset)
+static inline u32 get_txbuffer_desc_addr_low(__le32 *__pdesc, u8 __offset)
{
- return le32_to_cpu(*((__le32 *)(__pdesc + 16 * __offset + 4)));
+ return le32_to_cpu(*((__pdesc + 4 * __offset + 1)));
}
-static inline u32 get_txbuffer_desc_addr_high(u8 *pbd, u32 off, bool dma64)
+static inline u32 get_txbuffer_desc_addr_high(__le32 *pbd, u32 off, bool dma64)
{
if (dma64)
- return le32_to_cpu(*((__le32 *)(pbd + 16 * off + 8)));
+ return le32_to_cpu(*((pbd + 4 * off + 2)));
return 0;
}
/* Dword 0 */
-static inline void set_tx_buff_desc_len_0(u8 *__pdesc, u32 __val)
+static inline void set_tx_buff_desc_len_0(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(13, 0));
+ le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));
}
-static inline void set_tx_buff_desc_psb(u8 *__pdesc, u32 __val)
+static inline void set_tx_buff_desc_psb(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(30, 16));
+ le32p_replace_bits(__pdesc, __val, GENMASK(30, 16));
}
-static inline void set_tx_buff_desc_own(u8 *__pdesc, u32 __val)
+static inline void set_tx_buff_desc_own(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31));
+ le32p_replace_bits(__pdesc, __val, BIT(31));
}
/* Dword 1 */
-static inline void set_tx_buff_desc_addr_low_0(u8 *__pdesc, u32 __val)
+static inline void set_tx_buff_desc_addr_low_0(__le32 *__pdesc, u32 __val)
{
- *(__le32 *)(__pdesc + 4) = cpu_to_le32(__val);
+ *(__pdesc + 1) = cpu_to_le32(__val);
}
/* Dword 2 */
-static inline void set_tx_buff_desc_addr_high_0(u8 *pdesc, u32 val, bool dma64)
+static inline void set_tx_buff_desc_addr_high_0(__le32 *pdesc, u32 val,
+ bool dma64)
{
if (dma64)
- *(__le32 *)(pdesc + 8) = cpu_to_le32(val);
+ *(pdesc + 2) = cpu_to_le32(val);
else
- *(__le32 *)(pdesc + 8) = 0;
+ *(pdesc + 2) = 0;
}
/* RX buffer */
/* DWORD 0 */
-static inline void set_rx_buffer_desc_data_length(u8 *__status, u32 __val)
+static inline void set_rx_buffer_desc_data_length(__le32 *__status, u32 __val)
{
- le32p_replace_bits((__le32 *)__status, __val, GENMASK(13, 0));
+ le32p_replace_bits(__status, __val, GENMASK(13, 0));
}
-static inline void set_rx_buffer_desc_ls(u8 *__status, u32 __val)
+static inline void set_rx_buffer_desc_ls(__le32 *__status, u32 __val)
{
- le32p_replace_bits((__le32 *)__status, __val, BIT(15));
+ le32p_replace_bits(__status, __val, BIT(15));
}
-static inline void set_rx_buffer_desc_fs(u8 *__status, u32 __val)
+static inline void set_rx_buffer_desc_fs(__le32 *__status, u32 __val)
{
- le32p_replace_bits((__le32 *)__status, __val, BIT(16));
+ le32p_replace_bits(__status, __val, BIT(16));
}
-static inline void set_rx_buffer_desc_total_length(u8 *__status, u32 __val)
+static inline void set_rx_buffer_desc_total_length(__le32 *__status, u32 __val)
{
- le32p_replace_bits((__le32 *)__status, __val, GENMASK(30, 16));
+ le32p_replace_bits(__status, __val, GENMASK(30, 16));
}
-static inline int get_rx_buffer_desc_ls(u8 *__status)
+static inline int get_rx_buffer_desc_ls(__le32 *__status)
{
- return le32_get_bits(*((__le32 *)__status), BIT(15));
+ return le32_get_bits(*(__status), BIT(15));
}
-static inline int get_rx_buffer_desc_fs(u8 *__status)
+static inline int get_rx_buffer_desc_fs(__le32 *__status)
{
- return le32_get_bits(*((__le32 *)__status), BIT(16));
+ return le32_get_bits(*(__status), BIT(16));
}
-static inline int get_rx_buffer_desc_total_length(u8 *__status)
+static inline int get_rx_buffer_desc_total_length(__le32 *__status)
{
- return le32_get_bits(*((__le32 *)__status), GENMASK(30, 16));
+ return le32_get_bits(*(__status), GENMASK(30, 16));
}
/* DWORD 1 */
-static inline void set_rx_buffer_physical_low(u8 *__status, u32 __val)
+static inline void set_rx_buffer_physical_low(__le32 *__status, u32 __val)
{
- *(__le32 *)(__status + 4) = cpu_to_le32(__val);
+ *(__status + 1) = cpu_to_le32(__val);
}
/* DWORD 2 */
-static inline void set_rx_buffer_physical_high(u8 *__rx_status_desc, u32 __val,
- bool dma64)
+static inline void set_rx_buffer_physical_high(__le32 *__rx_status_desc,
+ u32 __val, bool dma64)
{
if (dma64)
- *(__le32 *)(__rx_status_desc + 8) = cpu_to_le32(__val);
+ *(__rx_status_desc + 2) = cpu_to_le32(__val);
else
- *(__le32 *)(__rx_status_desc + 8) = 0;
+ *(__rx_status_desc + 2) = 0;
}
-static inline int get_rx_desc_pkt_len(u8 *__pdesc)
+static inline int get_rx_desc_pkt_len(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, GENMASK(13, 0));
+ return le32_get_bits(*__pdesc, GENMASK(13, 0));
}
-static inline int get_rx_desc_crc32(u8 *__pdesc)
+static inline int get_rx_desc_crc32(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, BIT(14));
+ return le32_get_bits(*__pdesc, BIT(14));
}
-static inline int get_rx_desc_icv(u8 *__pdesc)
+static inline int get_rx_desc_icv(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, BIT(15));
+ return le32_get_bits(*__pdesc, BIT(15));
}
-static inline int get_rx_desc_drv_info_size(u8 *__pdesc)
+static inline int get_rx_desc_drv_info_size(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, GENMASK(19, 16));
+ return le32_get_bits(*__pdesc, GENMASK(19, 16));
}
-static inline int get_rx_desc_shift(u8 *__pdesc)
+static inline int get_rx_desc_shift(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, GENMASK(25, 24));
+ return le32_get_bits(*__pdesc, GENMASK(25, 24));
}
-static inline int get_rx_desc_physt(u8 *__pdesc)
+static inline int get_rx_desc_physt(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, BIT(26));
+ return le32_get_bits(*__pdesc, BIT(26));
}
-static inline int get_rx_desc_swdec(u8 *__pdesc)
+static inline int get_rx_desc_swdec(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, BIT(27));
+ return le32_get_bits(*__pdesc, BIT(27));
}
-static inline int get_rx_desc_own(u8 *__pdesc)
+static inline int get_rx_desc_own(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)__pdesc, BIT(31));
+ return le32_get_bits(*__pdesc, BIT(31));
}
-static inline void set_rx_desc_eor(u8 *__pdesc, u32 __val)
+static inline void set_rx_desc_eor(__le32 *__pdesc, u32 __val)
{
- le32p_replace_bits((__le32 *)__pdesc, __val, BIT(30));
+ le32p_replace_bits(__pdesc, __val, BIT(30));
}
-static inline int get_rx_desc_macid(u8 *__pdesc)
+static inline int get_rx_desc_macid(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 4), GENMASK(6, 0));
+ return le32_get_bits(*(__pdesc + 1), GENMASK(6, 0));
}
-static inline int get_rx_desc_paggr(u8 *__pdesc)
+static inline int get_rx_desc_paggr(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 4), BIT(15));
+ return le32_get_bits(*(__pdesc + 1), BIT(15));
}
-static inline int get_rx_status_desc_rpt_sel(u8 *__pdesc)
+static inline int get_rx_status_desc_rpt_sel(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 8), BIT(28));
+ return le32_get_bits(*(__pdesc + 2), BIT(28));
}
-static inline int get_rx_desc_rxmcs(u8 *__pdesc)
+static inline int get_rx_desc_rxmcs(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 12), GENMASK(6, 0));
+ return le32_get_bits(*(__pdesc + 3), GENMASK(6, 0));
}
-static inline int get_rx_status_desc_pattern_match(u8 *__pdesc)
+static inline int get_rx_status_desc_pattern_match(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(29));
+ return le32_get_bits(*(__pdesc + 3), BIT(29));
}
-static inline int get_rx_status_desc_unicast_match(u8 *__pdesc)
+static inline int get_rx_status_desc_unicast_match(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(30));
+ return le32_get_bits(*(__pdesc + 3), BIT(30));
}
-static inline int get_rx_status_desc_magic_match(u8 *__pdesc)
+static inline int get_rx_status_desc_magic_match(__le32 *__pdesc)
{
- return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(31));
+ return le32_get_bits(*(__pdesc + 3), BIT(31));
}
-static inline u32 get_rx_desc_tsfl(u8 *__pdesc)
+static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)
{
- return le32_to_cpu(*((__le32 *)(__pdesc + 20)));
+ return le32_to_cpu(*((__pdesc + 5)));
}
-static inline u32 get_rx_desc_buff_addr(u8 *__pdesc)
+static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)
{
- return le32_to_cpu(*((__le32 *)(__pdesc + 24)));
+ return le32_to_cpu(*((__pdesc + 6)));
}
/* TX report 2 format in Rx desc*/
-static inline u32 get_rx_rpt2_desc_macid_valid_1(u8 *__status)
+static inline u32 get_rx_rpt2_desc_macid_valid_1(__le32 *__status)
{
- return le32_to_cpu(*((__le32 *)(__status + 16)));
+ return le32_to_cpu(*((__status + 4)));
}
-static inline u32 get_rx_rpt2_desc_macid_valid_2(u8 *__status)
+static inline u32 get_rx_rpt2_desc_macid_valid_2(__le32 *__status)
{
- return le32_to_cpu(*((__le32 *)(__status + 20)));
+ return le32_to_cpu(*((__status + 5)));
}
-#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
-do { \
- if (_size > TX_DESC_NEXT_DESC_OFFSET) \
- memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
- else \
- memset(__pdesc, 0, _size); \
-} while (0)
+static inline void clear_pci_tx_desc_content(__le32 *__pdesc, int _size)
+{
+ if (_size > TX_DESC_NEXT_DESC_OFFSET)
+ memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);
+ else
+ memset(__pdesc, 0, _size);
+}
#define RTL92EE_RX_HAL_IS_CCK_RATE(rxmcs)\
(rxmcs == DESC_RATE1M ||\
--
2.16.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 5/5] rtlwifi: rtl8192ee: Remove some variable initializations
2019-08-31 18:06 [PATCH 0/5] rtlwifi: rtl8192ee: Replace local TX and RX bit manipulation macros Larry Finger
` (3 preceding siblings ...)
2019-08-31 18:06 ` [PATCH 4/5] rtlwifi: rtl8192ee: Convert inline routines to little-endian words Larry Finger
@ 2019-08-31 18:06 ` Larry Finger
4 siblings, 0 replies; 7+ messages in thread
From: Larry Finger @ 2019-08-31 18:06 UTC (permalink / raw)
To: kvalo; +Cc: linux-wireless, pkshih, Larry Finger
A number of variables are initialized when declared that set later in the
routine, thus the initialization can be removed.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
---
.../net/wireless/realtek/rtlwifi/rtl8192ee/trx.c | 26 ++++++++++++----------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
index 0706888fe3de..27f1a631b569 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
@@ -34,7 +34,7 @@ static void _rtl92ee_query_rxphystatus(struct ieee80211_hw *hw,
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
- s8 rx_pwr_all = 0, rx_pwr[4];
+ s8 rx_pwr_all, rx_pwr[4];
u8 rf_rx_num = 0, evm, pwdb_all;
u8 i, max_spatial_stream;
u32 rssi, total_rssi = 0;
@@ -95,6 +95,7 @@ static void _rtl92ee_query_rxphystatus(struct ieee80211_hw *hw,
rx_pwr_all = 14 - 2 * vga_idx;
break;
default:
+ rx_pwr_all = 0;
break;
}
rx_pwr_all += 16;
@@ -273,7 +274,7 @@ static void _rtl92ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
u8 *virtualaddress8)
{
- u32 dwtmp = 0;
+ u32 dwtmp;
__le32 *virtualaddress = (__le32 *)virtualaddress8;
memset(virtualaddress, 0, 8);
@@ -458,8 +459,8 @@ u16 rtl92ee_rx_desc_buff_remained_cnt(struct ieee80211_hw *hw, u8 queue_index)
{
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_priv *rtlpriv = rtl_priv(hw);
- u16 read_point = 0, write_point = 0, remind_cnt = 0;
- u32 tmp_4byte = 0;
+ u16 read_point, write_point, remind_cnt;
+ u32 tmp_4byte;
static bool start_rx;
tmp_4byte = rtl_read_dword(rtlpriv, REG_RXQ_TXBD_IDX);
@@ -493,7 +494,7 @@ u16 rtl92ee_rx_desc_buff_remained_cnt(struct ieee80211_hw *hw, u8 queue_index)
static u16 get_desc_addr_fr_q_idx(u16 queue_index)
{
- u16 desc_address = REG_BEQ_TXBD_IDX;
+ u16 desc_address;
switch (queue_index) {
case BK_QUEUE:
@@ -524,6 +525,7 @@ static u16 get_desc_addr_fr_q_idx(u16 queue_index)
desc_address = REG_BEQ_TXBD_IDX;
break;
default:
+ desc_address = REG_BEQ_TXBD_IDX;
break;
}
return desc_address;
@@ -533,7 +535,7 @@ u16 rtl92ee_get_available_desc(struct ieee80211_hw *hw, u8 q_idx)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u16 point_diff = 0;
- u16 current_tx_read_point = 0, current_tx_write_point = 0;
+ u16 current_tx_read_point, current_tx_write_point;
u32 tmp_4byte;
tmp_4byte = rtl_read_dword(rtlpriv,
@@ -557,10 +559,10 @@ void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
u32 pkt_len = skb->len;
u16 desc_size = 40; /*tx desc size*/
u32 psblen = 0;
- u16 tx_page_size = 0;
- u32 total_packet_size = 0;
+ u16 tx_page_size;
+ u32 total_packet_size;
u16 current_bd_desc;
- u8 i = 0;
+ u8 i;
u16 real_desc_size = 0x28;
u16 append_early_mode_size = 0;
u8 segmentnum = 1 << (RTL8192EE_SEG_NUM + 1);
@@ -649,7 +651,7 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
u16 seq_number;
__le16 fc = hdr->frame_control;
- unsigned int buf_len = 0;
+ unsigned int buf_len;
u8 fw_qsel = _rtl92ee_map_hwqueue_to_fwqueue(skb, hw_queue);
bool firstseg = ((hdr->seq_ctrl &
cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
@@ -657,7 +659,7 @@ void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
dma_addr_t mapping;
u8 bw_40 = 0;
- u8 short_gi = 0;
+ u8 short_gi;
__le32 *pdesc = (__le32 *)pdesc8;
if (mac->opmode == NL80211_IFTYPE_STATION) {
@@ -1009,7 +1011,7 @@ bool rtl92ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
{
u16 cur_tx_rp, cur_tx_wp;
- u32 tmpu32 = 0;
+ u32 tmpu32;
tmpu32 =
rtl_read_dword(rtlpriv,
--
2.16.4
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