From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51401C3A5A2 for ; Tue, 3 Sep 2019 21:58:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 27D1522CF7 for ; Tue, 3 Sep 2019 21:58:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="CsgxhoKj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726618AbfICV6J (ORCPT ); Tue, 3 Sep 2019 17:58:09 -0400 Received: from mail-pf1-f201.google.com ([209.85.210.201]:34161 "EHLO mail-pf1-f201.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725977AbfICV6I (ORCPT ); Tue, 3 Sep 2019 17:58:08 -0400 Received: by mail-pf1-f201.google.com with SMTP id i2so15079351pfe.1 for ; Tue, 03 Sep 2019 14:58:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=NRnaqKGOMM6Gjnc7Eddxq9QW9f6iAXK8LuOyj+cE24g=; b=CsgxhoKjBKHgFbzYo6dd9pFseWpzj5zcbk+HgNRBZbbkTXkitapVLutpUGTot5qvkX SWEop8n4jTkw0hHbv2FAdWL369nAGHTLDPBGuly3uUvRFPfLdunNwoJqrEf/KtJ9QPm3 aG3W3RfZ5DlPvdldWmcXAocTQyfMZTk4cBFZpoX8Om7/S2FascWU6bPM/8FISiOfOeqW /b/sjYMFLaH9tteCmLY4EtCOQ3aLE/soQf+m/mFkoGy+N3kGQh4aG0+gBQH76JsGou/l TsyTaTkM8BsT1oSgwI4cLvqW3dQHgRWyE361b2nL9UcPe7cC6gALHATj0SOLnD1m2W/X TqyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=NRnaqKGOMM6Gjnc7Eddxq9QW9f6iAXK8LuOyj+cE24g=; b=TuKSKrAeUeOE2sbBf4285VCgHdTMFkoVxQUJE2zcfKu0ParkuOWKudEAeLqrv8DOlK BvkuziCGWHJ4357+j8RZyn2C/3HgeHiyMPERXHYqnbog6lI5jLxC4gVfzHJE+3bEI1TW PvqhnIRlRrZTFN1/7vXU0fVgQ//204FWg/ASgl4lStb7eP7X/ZhKKUdLKE3ffUr1BnSf jpyq0CG0+QnNJV2chkfc5RE4rliZfD3uB8vlM16WSGmvL/Jws0iFOSMybFIUacGs07eO BkgSxkFRAHP42p5SDYVKMY/Yg2O+PYgDD1glGc2CkETZ32RmjPVju8Q9TJrwIM2dzSiJ bffg== X-Gm-Message-State: APjAAAXYW8If+dQkkSOMxlp1KAbEKbdxdIvJtD/2lN6iw1m2kQ9CKq1g oUyomRWsvmbPLC1lhd+uXsDjoMQwAW9SxpMYWNq3sYAPfJnP7Re+4KsjBUNvlt/0e2/nPoYjcm5 1ybcwCHHcV6kjxgMpxDghXMnJyVVnJTzmB8tfHcllzzZ1ykWw/87hkdqPqg== X-Google-Smtp-Source: APXvYqzZ3af0gEwBYRpliQddxD82oMBbJ5OKlxf/8ROle4Qg+Q6ObuxMkPfpf9gBifZnXgi+6RkL2xjXUdU= X-Received: by 2002:a63:f048:: with SMTP id s8mr31617484pgj.26.1567547887571; Tue, 03 Sep 2019 14:58:07 -0700 (PDT) Date: Tue, 3 Sep 2019 14:57:54 -0700 In-Reply-To: <20190903215801.183193-1-oupton@google.com> Message-Id: <20190903215801.183193-2-oupton@google.com> Mime-Version: 1.0 References: <20190903215801.183193-1-oupton@google.com> X-Mailer: git-send-email 2.23.0.187.g17f5b7556c-goog Subject: [PATCH v3 1/8] KVM: nVMX: Use kvm_set_msr to load IA32_PERF_GLOBAL_CTRL on vmexit From: Oliver Upton To: kvm@vger.kernel.org, Paolo Bonzini , "=?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?=" Cc: Jim Mattson , Peter Shier , Krish Sadhukhan , Sean Christopherson , Oliver Upton Content-Type: text/plain; charset="UTF-8" Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The existing implementation for loading the IA32_PERF_GLOBAL_CTRL MSR on VM-exit was incorrect, as the next call to atomic_switch_perf_msrs() could cause this value to be overwritten. Instead, call kvm_set_msr() which will allow atomic_switch_perf_msrs() to correctly set the values. Suggested-by: Jim Mattson Co-developed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan Signed-off-by: Oliver Upton --- arch/x86/kvm/vmx/nested.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index ced9fba32598..b0ca34bf4d21 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -3724,6 +3724,7 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) { struct kvm_segment seg; + struct msr_data msr_info; u32 entry_failure_code; if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER) @@ -3800,9 +3801,15 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat); vcpu->arch.pat = vmcs12->host_ia32_pat; } - if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) - vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL, - vmcs12->host_ia32_perf_global_ctrl); + if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) { + msr_info.host_initiated = false; + msr_info.index = MSR_CORE_PERF_GLOBAL_CTRL; + msr_info.data = vmcs12->host_ia32_perf_global_ctrl; + if (kvm_set_msr(vcpu, &msr_info)) + pr_debug_ratelimited( + "%s cannot write MSR (0x%x, 0x%llx)\n", + __func__, msr_info.index, msr_info.data); + } /* Set L1 segment info according to Intel SDM 27.5.2 Loading Host Segment and Descriptor-Table Registers */ -- 2.23.0.187.g17f5b7556c-goog