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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v5 2/8] drm/i915: Use literal representation of cdclk tables
Date: Wed, 11 Sep 2019 13:34:58 +0300	[thread overview]
Message-ID: <20190911103458.GV7482@intel.com> (raw)
In-Reply-To: <20190910161506.7158-1-matthew.d.roper@intel.com>

On Tue, Sep 10, 2019 at 09:15:06AM -0700, Matt Roper wrote:
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index 4d6f7f5f8930..1afa84ab6018 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -15,6 +15,13 @@ struct intel_atomic_state;
>  struct intel_cdclk_state;
>  struct intel_crtc_state;
>  
> +struct intel_cdclk_vals {
> +	u16 refclk;
> +	u32 cdclk;

Those two should be swapped around, otherwise the compiler will pad
things out needlessly.

> +	u8 divider;	/* CD2X divider * 2 */
> +	u8 ratio;
> +};
> +
>  int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
>  void intel_cdclk_init(struct drm_i915_private *i915);
>  void intel_cdclk_uninit(struct drm_i915_private *i915);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e289b4ffd34b..ff6aff2a4866 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1420,6 +1420,9 @@ struct drm_i915_private {
>  		/* The current hardware cdclk state */
>  		struct intel_cdclk_state hw;
>  
> +		/* cdclk, divider, and ratio table from bspec */
> +		const struct intel_cdclk_vals *table;
> +
>  		int force_min_cdclk;
>  	} cdclk;
>  
> -- 
> 2.20.1

-- 
Ville Syrjälä
Intel
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-09-11 10:35 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-10 15:42 [PATCH v4 0/8] cdclk consolidation and rework for BXT-TGL Matt Roper
2019-09-10 15:42 ` [PATCH v4 1/8] drm/i915: Consolidate bxt/cnl/icl cdclk readout Matt Roper
2019-09-10 15:46   ` Ville Syrjälä
2019-09-10 16:05     ` [PATCH v5 " Matt Roper
2019-09-10 15:42 ` [PATCH v4 2/8] drm/i915: Use literal representation of cdclk tables Matt Roper
2019-09-10 16:04   ` Ville Syrjälä
2019-09-10 16:06   ` Ville Syrjälä
2019-09-10 16:15     ` [PATCH v5 " Matt Roper
2019-09-11 10:34       ` Ville Syrjälä [this message]
2019-09-10 15:42 ` [PATCH v4 3/8] drm/i915: Combine bxt_set_cdclk and cnl_set_cdclk Matt Roper
2019-09-10 15:42 ` [PATCH v4 4/8] drm/i915: Kill cnl_sanitize_cdclk() Matt Roper
2019-09-10 15:42 ` [PATCH v4 5/8] drm/i915: Consolidate {bxt, cnl, icl}_uninit_cdclk Matt Roper
2019-09-10 15:42 ` [PATCH v4 6/8] drm/i915: Add calc_voltage_level display vfunc Matt Roper
2019-09-10 15:42 ` [PATCH v4 7/8] drm/i915: Enhance cdclk sanitization Matt Roper
2019-09-10 15:42 ` [PATCH v4 8/8] drm/i915: Consolidate {bxt, cnl, icl}_init_cdclk Matt Roper
2019-09-10 16:10 ` ✗ Fi.CI.CHECKPATCH: warning for cdclk consolidation and rework for BXT-TGL (rev5) Patchwork
2019-09-10 16:36 ` ✗ Fi.CI.CHECKPATCH: warning for cdclk consolidation and rework for BXT-TGL (rev6) Patchwork
2019-09-10 16:47 ` ✓ Fi.CI.BAT: success for cdclk consolidation and rework for BXT-TGL (rev5) Patchwork
2019-09-10 16:58 ` ✓ Fi.CI.BAT: success for cdclk consolidation and rework for BXT-TGL (rev6) Patchwork
2019-09-10 23:55 ` ✓ Fi.CI.IGT: " Patchwork
2019-09-11  3:43   ` Matt Roper
2019-09-11  6:16     ` Saarinen, Jani
2019-09-11  6:32       ` Peres, Martin

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