From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: James Ausmus <james.ausmus@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Fix memory type read in bandwidth calc
Date: Wed, 11 Sep 2019 16:23:52 +0300 [thread overview]
Message-ID: <20190911132352.GZ7482@intel.com> (raw)
In-Reply-To: <20190910145651.18569-1-james.ausmus@intel.com>
On Tue, Sep 10, 2019 at 07:56:51AM -0700, James Ausmus wrote:
> The returned memory value does not align with BSpec - update to correct
> this.
Hrm. The values came directly from "IceLake PCODE/Punit Mailboxes MAS"
.doc. The question is which documentation is more correct?
>
> BSpec: 54023
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: James Ausmus <james.ausmus@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bw.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 688858ebe4d0..af9b849c2c3e 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -39,15 +39,19 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> case 0:
> qi->dram_type = INTEL_DRAM_DDR4;
> break;
> - case 1:
> - qi->dram_type = INTEL_DRAM_DDR3;
> + case 3:
> + qi->dram_type = INTEL_DRAM_LPDDR4;
> break;
> - case 2:
> - qi->dram_type = INTEL_DRAM_LPDDR3;
> + case 4:
> + qi->dram_type = INTEL_DRAM_DDR3;
> break;
> - case 3:
> + case 5:
> qi->dram_type = INTEL_DRAM_LPDDR3;
> break;
> + case 1:
> + case 2:
> + /* Unimplemented */
> + /* fall through */
> default:
> MISSING_CASE(val & 0xf);
> break;
> --
> 2.22.1
--
Ville Syrjälä
Intel
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parent reply other threads:[~2019-09-11 13:23 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <20190910145651.18569-1-james.ausmus@intel.com>]
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