* [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth.
@ 2019-09-20 10:44 Stanislav Lisovskiy
2019-09-20 13:19 ` Ville Syrjälä
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Stanislav Lisovskiy @ 2019-09-20 10:44 UTC (permalink / raw)
To: intel-gfx; +Cc: ville.syrjala, martin.peres
According to BSpec 53998, we should try to
restrict qgv points, which can't provide
enough bandwidth for desired display configuration.
Currently we are just comparing against all of
those and take minimum(worst case).
v2: Fixed wrong PCode reply mask, removed hardcoded
values.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 58 +++++++++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 3 ++
2 files changed, 58 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index cd58e47ab7b2..7653cbdb0ee4 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -90,6 +90,26 @@ static int icl_pcode_read_qgv_point_info(struct drm_i915_private *dev_priv,
return 0;
}
+static int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv, u32 points_mask)
+{
+ int ret;
+
+ /* bspec says to keep retrying for at least 1 ms */
+ ret = skl_pcode_request(dev_priv, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
+ points_mask,
+ GEN11_PCODE_POINTS_RESTRICTED_MASK,
+ GEN11_PCODE_POINTS_RESTRICTED,
+ 1);
+
+ if (ret < 0) {
+ DRM_ERROR("Failed to disable qgv points (%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+
static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
struct intel_qgv_info *qi)
{
@@ -354,7 +374,9 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
unsigned int data_rate, max_data_rate;
unsigned int num_active_planes;
struct intel_crtc *crtc;
- int i;
+ int i, ret;
+ struct intel_qgv_info qi = {};
+ u32 points_mask = 0;
/* FIXME earlier gens need some checks too */
if (INTEL_GEN(dev_priv) < 11)
@@ -398,10 +420,40 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
data_rate = intel_bw_data_rate(dev_priv, bw_state);
num_active_planes = intel_bw_num_active_planes(dev_priv, bw_state);
- max_data_rate = intel_max_data_rate(dev_priv, num_active_planes);
-
data_rate = DIV_ROUND_UP(data_rate, 1000);
+ ret = icl_get_qgv_points(dev_priv, &qi);
+ if (ret < 0) {
+ goto fallback;
+ }
+
+ for (i = 0; i < qi.num_points; i++) {
+ max_data_rate = icl_max_bw(dev_priv, num_active_planes, i);
+ if (max_data_rate < data_rate) {
+ DRM_DEBUG_KMS("QGV point %d: max bw %d required %d restricted\n",
+ i, max_data_rate, data_rate);
+ points_mask |= 1 << i;
+ } else
+ DRM_DEBUG_KMS("QGV point %d: max bw %d required %d unrestricted\n",
+ i, max_data_rate, data_rate);
+ }
+
+ if (points_mask >= ((1 << qi.num_points) - 1)) {
+ DRM_DEBUG_KMS("Could not find any suitable QGV points\n");
+ return -EINVAL;
+ }
+
+ ret = icl_pcode_restrict_qgv_points(dev_priv, points_mask);
+ if (ret < 0) {
+ DRM_DEBUG_KMS("Could not restrict required gqv points(%d)\n", ret);
+ goto fallback;
+ }
+
+ return 0;
+
+fallback:
+ max_data_rate = intel_max_data_rate(dev_priv, num_active_planes);
+
if (data_rate > max_data_rate) {
DRM_DEBUG_KMS("Bandwidth %u MB/s exceeds max available %d MB/s (%d active planes)\n",
data_rate, max_data_rate, num_active_planes);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bf37ecebc82f..fe327fee8781 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8845,6 +8845,7 @@ enum {
#define ICL_PCODE_MEM_SUBSYSYSTEM_INFO 0xd
#define ICL_PCODE_MEM_SS_READ_GLOBAL_INFO (0x0 << 8)
#define ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point) (((point) << 16) | (0x1 << 8))
+#define ICL_PCODE_SAGV_DE_MEM_SS_CONFIG 0xe
#define GEN6_PCODE_READ_D_COMP 0x10
#define GEN6_PCODE_WRITE_D_COMP 0x11
#define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17
@@ -8856,6 +8857,8 @@ enum {
#define GEN9_SAGV_DISABLE 0x0
#define GEN9_SAGV_IS_DISABLED 0x1
#define GEN9_SAGV_ENABLE 0x3
+#define GEN11_PCODE_POINTS_RESTRICTED 0x0
+#define GEN11_PCODE_POINTS_RESTRICTED_MASK 0x1
#define GEN6_PCODE_DATA _MMIO(0x138128)
#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
#define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth. 2019-09-20 10:44 [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth Stanislav Lisovskiy @ 2019-09-20 13:19 ` Ville Syrjälä 2019-09-20 13:31 ` Lisovskiy, Stanislav 2019-09-20 14:24 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) Patchwork ` (2 subsequent siblings) 3 siblings, 1 reply; 6+ messages in thread From: Ville Syrjälä @ 2019-09-20 13:19 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx, ville.syrjala, martin.peres On Fri, Sep 20, 2019 at 01:44:13PM +0300, Stanislav Lisovskiy wrote: > According to BSpec 53998, we should try to > restrict qgv points, which can't provide > enough bandwidth for desired display configuration. > > Currently we are just comparing against all of > those and take minimum(worst case). > > v2: Fixed wrong PCode reply mask, removed hardcoded > values. > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bw.c | 58 +++++++++++++++++++++++-- > drivers/gpu/drm/i915/i915_reg.h | 3 ++ > 2 files changed, 58 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c > index cd58e47ab7b2..7653cbdb0ee4 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -90,6 +90,26 @@ static int icl_pcode_read_qgv_point_info(struct drm_i915_private *dev_priv, > return 0; > } > > +static int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv, u32 points_mask) > +{ > + int ret; > + > + /* bspec says to keep retrying for at least 1 ms */ > + ret = skl_pcode_request(dev_priv, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, > + points_mask, > + GEN11_PCODE_POINTS_RESTRICTED_MASK, > + GEN11_PCODE_POINTS_RESTRICTED, > + 1); > + > + if (ret < 0) { > + DRM_ERROR("Failed to disable qgv points (%d)\n", ret); > + return ret; > + } > + > + return 0; > +} > + > + > static int icl_get_qgv_points(struct drm_i915_private *dev_priv, > struct intel_qgv_info *qi) > { > @@ -354,7 +374,9 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) > unsigned int data_rate, max_data_rate; > unsigned int num_active_planes; > struct intel_crtc *crtc; > - int i; > + int i, ret; > + struct intel_qgv_info qi = {}; > + u32 points_mask = 0; > > /* FIXME earlier gens need some checks too */ > if (INTEL_GEN(dev_priv) < 11) > @@ -398,10 +420,40 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) > data_rate = intel_bw_data_rate(dev_priv, bw_state); > num_active_planes = intel_bw_num_active_planes(dev_priv, bw_state); > > - max_data_rate = intel_max_data_rate(dev_priv, num_active_planes); > - > data_rate = DIV_ROUND_UP(data_rate, 1000); > > + ret = icl_get_qgv_points(dev_priv, &qi); > + if (ret < 0) { > + goto fallback; If we don't have that we don't have any idea about bw limits. So probably just return 0 here. > + } > + > + for (i = 0; i < qi.num_points; i++) { > + max_data_rate = icl_max_bw(dev_priv, num_active_planes, i); > + if (max_data_rate < data_rate) { > + DRM_DEBUG_KMS("QGV point %d: max bw %d required %d restricted\n", > + i, max_data_rate, data_rate); > + points_mask |= 1 << i; I think just marking the accepted levels in the mask would make things simpler... > + } else > + DRM_DEBUG_KMS("QGV point %d: max bw %d required %d unrestricted\n", > + i, max_data_rate, data_rate); > + } > + > + if (points_mask >= ((1 << qi.num_points) - 1)) { ... eg. this can then just be 'if (points_mask == 0)' > + DRM_DEBUG_KMS("Could not find any suitable QGV points\n"); > + return -EINVAL; > + } > + > + ret = icl_pcode_restrict_qgv_points(dev_priv, points_mask); > + if (ret < 0) { > + DRM_DEBUG_KMS("Could not restrict required gqv points(%d)\n", ret); > + goto fallback; Seems like dead code to me. We'll need to account for the SAGV yes/no in here as well. That is, if SAGV is off due to watermarks we'll need to restrict things to the highest QGV point only. Also using both the QGV point restriction pcode command and the legacy SAGV pcode command at the same time sounds rather risky to me. I suspect pcode might not expect that. So we need to rework this on a slightly bigger scale. > + } > + > + return 0; > + > +fallback: > + max_data_rate = intel_max_data_rate(dev_priv, num_active_planes); > + > if (data_rate > max_data_rate) { > DRM_DEBUG_KMS("Bandwidth %u MB/s exceeds max available %d MB/s (%d active planes)\n", > data_rate, max_data_rate, num_active_planes); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index bf37ecebc82f..fe327fee8781 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -8845,6 +8845,7 @@ enum { > #define ICL_PCODE_MEM_SUBSYSYSTEM_INFO 0xd > #define ICL_PCODE_MEM_SS_READ_GLOBAL_INFO (0x0 << 8) > #define ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point) (((point) << 16) | (0x1 << 8)) > +#define ICL_PCODE_SAGV_DE_MEM_SS_CONFIG 0xe > #define GEN6_PCODE_READ_D_COMP 0x10 > #define GEN6_PCODE_WRITE_D_COMP 0x11 > #define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17 > @@ -8856,6 +8857,8 @@ enum { > #define GEN9_SAGV_DISABLE 0x0 > #define GEN9_SAGV_IS_DISABLED 0x1 > #define GEN9_SAGV_ENABLE 0x3 > +#define GEN11_PCODE_POINTS_RESTRICTED 0x0 > +#define GEN11_PCODE_POINTS_RESTRICTED_MASK 0x1 > #define GEN6_PCODE_DATA _MMIO(0x138128) > #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8 > #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16 > -- > 2.17.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth. 2019-09-20 13:19 ` Ville Syrjälä @ 2019-09-20 13:31 ` Lisovskiy, Stanislav 0 siblings, 0 replies; 6+ messages in thread From: Lisovskiy, Stanislav @ 2019-09-20 13:31 UTC (permalink / raw) To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, Syrjala, Ville, Peres, Martin On Fri, 2019-09-20 at 16:19 +0300, Ville Syrjälä wrote: > On Fri, Sep 20, 2019 at 01:44:13PM +0300, Stanislav Lisovskiy wrote: > > According to BSpec 53998, we should try to > > restrict qgv points, which can't provide > > enough bandwidth for desired display configuration. > > > > Currently we are just comparing against all of > > those and take minimum(worst case). > > > > v2: Fixed wrong PCode reply mask, removed hardcoded > > values. > > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_bw.c | 58 > > +++++++++++++++++++++++-- > > drivers/gpu/drm/i915/i915_reg.h | 3 ++ > > 2 files changed, 58 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > > b/drivers/gpu/drm/i915/display/intel_bw.c > > index cd58e47ab7b2..7653cbdb0ee4 100644 > > --- a/drivers/gpu/drm/i915/display/intel_bw.c > > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > > @@ -90,6 +90,26 @@ static int icl_pcode_read_qgv_point_info(struct > > drm_i915_private *dev_priv, > > return 0; > > } > > > > +static int icl_pcode_restrict_qgv_points(struct drm_i915_private > > *dev_priv, u32 points_mask) > > +{ > > + int ret; > > + > > + /* bspec says to keep retrying for at least 1 ms */ > > + ret = skl_pcode_request(dev_priv, > > ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, > > + points_mask, > > + GEN11_PCODE_POINTS_RESTRICTED_MASK, > > + GEN11_PCODE_POINTS_RESTRICTED, > > + 1); > > + > > + if (ret < 0) { > > + DRM_ERROR("Failed to disable qgv points (%d)\n", ret); > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > + > > static int icl_get_qgv_points(struct drm_i915_private *dev_priv, > > struct intel_qgv_info *qi) > > { > > @@ -354,7 +374,9 @@ int intel_bw_atomic_check(struct > > intel_atomic_state *state) > > unsigned int data_rate, max_data_rate; > > unsigned int num_active_planes; > > struct intel_crtc *crtc; > > - int i; > > + int i, ret; > > + struct intel_qgv_info qi = {}; > > + u32 points_mask = 0; > > > > /* FIXME earlier gens need some checks too */ > > if (INTEL_GEN(dev_priv) < 11) > > @@ -398,10 +420,40 @@ int intel_bw_atomic_check(struct > > intel_atomic_state *state) > > data_rate = intel_bw_data_rate(dev_priv, bw_state); > > num_active_planes = intel_bw_num_active_planes(dev_priv, > > bw_state); > > > > - max_data_rate = intel_max_data_rate(dev_priv, > > num_active_planes); > > - > > data_rate = DIV_ROUND_UP(data_rate, 1000); > > > > + ret = icl_get_qgv_points(dev_priv, &qi); > > + if (ret < 0) { > > + goto fallback; > > If we don't have that we don't have any idea about bw limits. So > probably just return 0 here. > > > + } > > + > > + for (i = 0; i < qi.num_points; i++) { > > + max_data_rate = icl_max_bw(dev_priv, num_active_planes, > > i); > > + if (max_data_rate < data_rate) { > > + DRM_DEBUG_KMS("QGV point %d: max bw %d required > > %d restricted\n", > > + i, max_data_rate, data_rate); > > + points_mask |= 1 << i; > > I think just marking the accepted levels in the mask would make > things > simpler... > > > + } else > > + DRM_DEBUG_KMS("QGV point %d: max bw %d required > > %d unrestricted\n", > > + i, max_data_rate, data_rate); > > + } > > + > > + if (points_mask >= ((1 << qi.num_points) - 1)) { > > ... eg. this can then just be 'if (points_mask == 0)' > > > + DRM_DEBUG_KMS("Could not find any suitable QGV > > points\n"); > > + return -EINVAL; > > + } > > + > > + ret = icl_pcode_restrict_qgv_points(dev_priv, points_mask); > > + if (ret < 0) { > > + DRM_DEBUG_KMS("Could not restrict required gqv > > points(%d)\n", ret); > > + goto fallback; > > Seems like dead code to me. > > We'll need to account for the SAGV yes/no in here as well. That is, > if > SAGV is off due to watermarks we'll need to restrict things to the > highest QGV point only. Also using both the QGV point restriction > pcode command and the legacy SAGV pcode command at the same time > sounds > rather risky to me. I suspect pcode might not expect that. So we need > to rework this on a slightly bigger scale. Well, I suspected that it's not going to be that easy.. Probably you mean that this has to be somehow put in sync with intel_disable_sagv calls, so we need to mutually exclude those and/or take into account. > > > + } > > + > > + return 0; > > + > > +fallback: > > + max_data_rate = intel_max_data_rate(dev_priv, > > num_active_planes); > > + > > if (data_rate > max_data_rate) { > > DRM_DEBUG_KMS("Bandwidth %u MB/s exceeds max available > > %d MB/s (%d active planes)\n", > > data_rate, max_data_rate, > > num_active_planes); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index bf37ecebc82f..fe327fee8781 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -8845,6 +8845,7 @@ enum { > > #define ICL_PCODE_MEM_SUBSYSYSTEM_INFO 0xd > > #define ICL_PCODE_MEM_SS_READ_GLOBAL_INFO (0x0 << 8) > > #define ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point) (((poin > > t) << 16) | (0x1 << 8)) > > +#define ICL_PCODE_SAGV_DE_MEM_SS_CONFIG 0xe > > #define GEN6_PCODE_READ_D_COMP 0x10 > > #define GEN6_PCODE_WRITE_D_COMP 0x11 > > #define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17 > > @@ -8856,6 +8857,8 @@ enum { > > #define GEN9_SAGV_DISABLE 0x0 > > #define GEN9_SAGV_IS_DISABLED 0x1 > > #define GEN9_SAGV_ENABLE 0x3 > > +#define GEN11_PCODE_POINTS_RESTRICTED 0x0 > > +#define GEN11_PCODE_POINTS_RESTRICTED_MASK 0x1 > > #define GEN6_PCODE_DATA _MMIO(0x138128) > > #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8 > > #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16 > > -- > > 2.17.1 > > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) 2019-09-20 10:44 [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth Stanislav Lisovskiy 2019-09-20 13:19 ` Ville Syrjälä @ 2019-09-20 14:24 ` Patchwork 2019-09-20 14:47 ` ✓ Fi.CI.BAT: success " Patchwork 2019-09-21 13:50 ` ✗ Fi.CI.IGT: failure " Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2019-09-20 14:24 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx == Series Details == Series: drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) URL : https://patchwork.freedesktop.org/series/66993/ State : warning == Summary == $ dim checkpatch origin/drm-tip 58676dcb1195 drm/i915: Restrict qgv points which don't have enough bandwidth. -:46: CHECK:LINE_SPACING: Please don't use multiple blank lines #46: FILE: drivers/gpu/drm/i915/display/intel_bw.c:109: + + -:70: WARNING:BRACES: braces {} are not necessary for single statement blocks #70: FILE: drivers/gpu/drm/i915/display/intel_bw.c:416: + if (ret < 0) { + goto fallback; + } -:80: CHECK:BRACES: Unbalanced braces around else statement #80: FILE: drivers/gpu/drm/i915/display/intel_bw.c:426: + } else total: 0 errors, 1 warnings, 2 checks, 93 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) 2019-09-20 10:44 [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth Stanislav Lisovskiy 2019-09-20 13:19 ` Ville Syrjälä 2019-09-20 14:24 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) Patchwork @ 2019-09-20 14:47 ` Patchwork 2019-09-21 13:50 ` ✗ Fi.CI.IGT: failure " Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2019-09-20 14:47 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx == Series Details == Series: drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) URL : https://patchwork.freedesktop.org/series/66993/ State : success == Summary == CI Bug Log - changes from CI_DRM_6928 -> Patchwork_14475 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/ Known issues ------------ Here are the changes found in Patchwork_14475 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic-read-write-distinct: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html * igt@i915_module_load@reload: - fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724] / [fdo#111214]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-icl-u3/igt@i915_module_load@reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-icl-u3/igt@i915_module_load@reload.html * igt@i915_selftest@live_gem_contexts: - fi-skl-6770hq: [PASS][5] -> [INCOMPLETE][6] ([fdo#111519] / [fdo#111700]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-skl-6770hq/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-skl-6770hq/igt@i915_selftest@live_gem_contexts.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#111045] / [fdo#111096]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@gem_ctx_switch@legacy-render: - fi-icl-u2: [INCOMPLETE][9] ([fdo#107713] / [fdo#111381]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-icl-u2/igt@gem_ctx_switch@legacy-render.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-icl-u2/igt@gem_ctx_switch@legacy-render.html * igt@i915_module_load@reload: - fi-blb-e6850: [INCOMPLETE][11] ([fdo#107718]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-blb-e6850/igt@i915_module_load@reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-blb-e6850/igt@i915_module_load@reload.html * igt@kms_addfb_basic@addfb25-x-tiled: - fi-icl-u3: [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14] +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/fi-icl-u3/igt@kms_addfb_basic@addfb25-x-tiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/fi-icl-u3/igt@kms_addfb_basic@addfb25-x-tiled.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214 [fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381 [fdo#111519]: https://bugs.freedesktop.org/show_bug.cgi?id=111519 [fdo#111700]: https://bugs.freedesktop.org/show_bug.cgi?id=111700 Participating hosts (54 -> 47) ------------------------------ Additional (1): fi-hsw-4770r Missing (8): fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6928 -> Patchwork_14475 CI-20190529: 20190529 CI_DRM_6928: 74bb5b031ca11c7036f7be21f42a73a057fc8da8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5194: 531d3d02d5e7a2a84d61b92b28fa01b822afc399 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14475: 58676dcb1195c94dc8f6db8978ac7651e16e5a54 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 58676dcb1195 drm/i915: Restrict qgv points which don't have enough bandwidth. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) 2019-09-20 10:44 [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth Stanislav Lisovskiy ` (2 preceding siblings ...) 2019-09-20 14:47 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-09-21 13:50 ` Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2019-09-21 13:50 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx == Series Details == Series: drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) URL : https://patchwork.freedesktop.org/series/66993/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6928_full -> Patchwork_14475_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_14475_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_14475_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14475_full: ### IGT changes ### #### Possible regressions #### * igt@kms_rotation_crc@primary-rotation-180: - shard-apl: [PASS][1] -> [TIMEOUT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-apl4/igt@kms_rotation_crc@primary-rotation-180.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-apl2/igt@kms_rotation_crc@primary-rotation-180.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * {igt@gem_eio@kms}: - shard-snb: [INCOMPLETE][3] ([fdo#105411]) -> [DMESG-WARN][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-snb1/igt@gem_eio@kms.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-snb7/igt@gem_eio@kms.html * {igt@i915_pm_dc@dc6-psr}: - shard-iclb: [PASS][5] -> [FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb1/igt@i915_pm_dc@dc6-psr.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb8/igt@i915_pm_dc@dc6-psr.html Known issues ------------ Here are the changes found in Patchwork_14475_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@vcs1-s3: - shard-kbl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-kbl6/igt@gem_ctx_isolation@vcs1-s3.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-kbl1/igt@gem_ctx_isolation@vcs1-s3.html * igt@gem_exec_reloc@basic-write-gtt-noreloc: - shard-apl: [PASS][9] -> [INCOMPLETE][10] ([fdo#103927]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-apl4/igt@gem_exec_reloc@basic-write-gtt-noreloc.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-apl2/igt@gem_exec_reloc@basic-write-gtt-noreloc.html * igt@gem_exec_schedule@preempt-queue-bsd1: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276]) +26 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd1.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#111325]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_softpin@noreloc-s3: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([fdo#104108]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl1/igt@gem_softpin@noreloc-s3.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl6/igt@gem_softpin@noreloc-s3.html * igt@kms_atomic_interruptible@universal-setplane-primary: - shard-hsw: [PASS][17] -> [INCOMPLETE][18] ([fdo#103540]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-hsw5/igt@kms_atomic_interruptible@universal-setplane-primary.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-hsw6/igt@kms_atomic_interruptible@universal-setplane-primary.html * igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#103232]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl5/igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103167]) +5 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][25] -> [FAIL][26] ([fdo#108145] / [fdo#110403]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109441]) +4 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-apl: [PASS][29] -> [DMESG-WARN][30] ([fdo#108566]) +3 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-apl1/igt@kms_vblank@pipe-c-ts-continuation-suspend.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-apl4/igt@kms_vblank@pipe-c-ts-continuation-suspend.html * igt@perf_pmu@cpu-hotplug: - shard-apl: [PASS][31] -> [TIMEOUT][32] ([fdo#111546]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-apl4/igt@perf_pmu@cpu-hotplug.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-apl2/igt@perf_pmu@cpu-hotplug.html #### Possible fixes #### * igt@gem_exec_balancer@smoke: - shard-iclb: [SKIP][33] ([fdo#110854]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb5/igt@gem_exec_balancer@smoke.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb4/igt@gem_exec_balancer@smoke.html * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [SKIP][35] ([fdo#111325]) -> [PASS][36] +8 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html * {igt@gem_mmap_gtt@close-race}: - shard-apl: [INCOMPLETE][37] ([fdo#103927]) -> [PASS][38] +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-apl3/igt@gem_mmap_gtt@close-race.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-apl8/igt@gem_mmap_gtt@close-race.html * igt@gem_tiled_swapping@non-threaded: - shard-glk: [DMESG-WARN][39] ([fdo#108686]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-glk4/igt@gem_tiled_swapping@non-threaded.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-glk3/igt@gem_tiled_swapping@non-threaded.html * igt@i915_suspend@sysfs-reader: - shard-apl: [DMESG-WARN][41] ([fdo#108566]) -> [PASS][42] +3 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-apl1/igt@i915_suspend@sysfs-reader.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-apl8/igt@i915_suspend@sysfs-reader.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-skl: [INCOMPLETE][43] ([fdo#110741]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_flip@flip-vs-dpms-interruptible: - shard-iclb: [INCOMPLETE][45] ([fdo#107713]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb1/igt@kms_flip@flip-vs-dpms-interruptible.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb3/igt@kms_flip@flip-vs-dpms-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-snb: [DMESG-WARN][47] ([fdo#102365]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-snb4/igt@kms_flip@flip-vs-suspend-interruptible.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-snb4/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite: - shard-iclb: [FAIL][49] ([fdo#103167]) -> [PASS][50] +2 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-cpu: - shard-skl: [FAIL][51] ([fdo#103167]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-cpu.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@psr-suspend: - shard-skl: [INCOMPLETE][53] ([fdo#104108] / [fdo#106978]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl9/igt@kms_frontbuffer_tracking@psr-suspend.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl9/igt@kms_frontbuffer_tracking@psr-suspend.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][55] ([fdo#108145] / [fdo#110403]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_plane_cursor@pipe-a-primary-size-128: - shard-kbl: [DMESG-WARN][57] ([fdo#103558] / [fdo#105602]) -> [PASS][58] +37 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-kbl6/igt@kms_plane_cursor@pipe-a-primary-size-128.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-kbl6/igt@kms_plane_cursor@pipe-a-primary-size-128.html * igt@kms_psr2_su@page_flip: - shard-iclb: [SKIP][59] ([fdo#109642] / [fdo#111068]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb4/igt@kms_psr2_su@page_flip.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb2/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [SKIP][61] ([fdo#109441]) -> [PASS][62] +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb3/igt@kms_psr@psr2_cursor_render.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb2/igt@kms_psr@psr2_cursor_render.html * igt@perf@blocking: - shard-skl: [FAIL][63] ([fdo#110728]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-skl7/igt@perf@blocking.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-skl1/igt@perf@blocking.html * igt@prime_busy@hang-bsd2: - shard-iclb: [SKIP][65] ([fdo#109276]) -> [PASS][66] +22 similar issues [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb8/igt@prime_busy@hang-bsd2.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb1/igt@prime_busy@hang-bsd2.html #### Warnings #### * igt@gem_mocs_settings@mocs-isolation-bsd2: - shard-iclb: [FAIL][67] ([fdo#111330]) -> [SKIP][68] ([fdo#109276]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb4/igt@gem_mocs_settings@mocs-isolation-bsd2.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb5/igt@gem_mocs_settings@mocs-isolation-bsd2.html * igt@gem_mocs_settings@mocs-settings-bsd2: - shard-iclb: [SKIP][69] ([fdo#109276]) -> [FAIL][70] ([fdo#111330]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb6/igt@gem_mocs_settings@mocs-settings-bsd2.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb1/igt@gem_mocs_settings@mocs-settings-bsd2.html * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d: - shard-kbl: [SKIP][71] ([fdo#105602] / [fdo#109271] / [fdo#109278]) -> [SKIP][72] ([fdo#109271] / [fdo#109278]) +3 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-kbl6/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-kbl6/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [SKIP][73] ([fdo#109349]) -> [DMESG-WARN][74] ([fdo#107724]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@kms_panel_fitting@legacy: - shard-kbl: [SKIP][75] ([fdo#105602] / [fdo#109271]) -> [SKIP][76] ([fdo#109271]) +30 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6928/shard-kbl6/igt@kms_panel_fitting@legacy.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/shard-kbl6/igt@kms_panel_fitting@legacy.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728 [fdo#110741]: https://bugs.freedesktop.org/show_bug.cgi?id=110741 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325 [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330 [fdo#111546]: https://bugs.freedesktop.org/show_bug.cgi?id=111546 Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6928 -> Patchwork_14475 CI-20190529: 20190529 CI_DRM_6928: 74bb5b031ca11c7036f7be21f42a73a057fc8da8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5194: 531d3d02d5e7a2a84d61b92b28fa01b822afc399 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14475: 58676dcb1195c94dc8f6db8978ac7651e16e5a54 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14475/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-09-21 13:50 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-09-20 10:44 [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth Stanislav Lisovskiy 2019-09-20 13:19 ` Ville Syrjälä 2019-09-20 13:31 ` Lisovskiy, Stanislav 2019-09-20 14:24 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Restrict qgv points which don't have enough bandwidth. (rev2) Patchwork 2019-09-20 14:47 ` ✓ Fi.CI.BAT: success " Patchwork 2019-09-21 13:50 ` ✗ Fi.CI.IGT: failure " Patchwork
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