From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ayan Halder Subject: Re: [PATCH] drm/fourcc: Add Arm 16x16 block modifier Date: Mon, 30 Sep 2019 13:35:23 +0000 Message-ID: <20190930133522.GA16273@arm.com> References: <1561112433-5308-1-git-send-email-raymond.smith@arm.com> <20190624093233.73f3tcshewlbogli@DESKTOP-E1NTVVP.localdomain> <20190624112301.dmczf2vofxnpzqqi@DESKTOP-E1NTVVP.localdomain> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from EUR03-DB5-obe.outbound.protection.outlook.com (mail-eopbgr40077.outbound.protection.outlook.com [40.107.4.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8667689CE1 for ; Mon, 30 Sep 2019 13:35:46 +0000 (UTC) In-Reply-To: Content-Language: en-US Content-ID: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Qiang Yu Cc: "maxime.ripard@bootlin.com" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "airlied@linux.ie" , "malidp@foss.arm.com" , nd , "sean@poorly.run" List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCBTZXAgMjAsIDIwMTkgYXQgMTA6MTU6NDFBTSArMDgwMCwgUWlhbmcgWXUgd3JvdGU6 Cj4gSGkgZ3V5cywKPiAKPiBJJ2QgbGlrZSB0byBrbm93IHRoZSBzdGF0dXMgb2YgdGhpcyBwYXRj aD8gSSBleHBlY3QgYSB2MiBhZGRpbmcgc29tZQo+IGNvbW1lbnRzL21hY3JvcyBhYm91dCB0aGUg aGlnaCBiaXQgcGxhbiB3b3VsZCBiZSBlbm91Z2g/Cj4gCj4gQFJheW1vbmQgJiBAQnJpYW4gZG8g eW91IHN0aWxsIG5lZWQgYW5vdGhlciBsb25nIHByb2Nlc3MgdG8gc2VuZCBvdXQgYQo+IHYyIHBh dGNoPyBJZiBzbywgSSBjYW4gaGVscCB0byBwcmVwYXJlIGEgdjIgcGF0Y2ggYWNjb3JkaW5nIHRv IHlvdXIKPiBwcmV2aW91cyBtYWlsLgoKQXBvbG9naWVzIGZvciB0aGUgbG9uZyB3YWl0LgpAUmF5 bW9uZCBoYXMgbGVmdCB0aGUgY29tcGFueSwgc28gbm93IEkgd2lsbCBiZSBsb29raW5nIGludG8g aXQuIEkKd2lsbCByZXNwaW4gdGhlIHBhdGNoIGluIGEgZGF5IG9yIHR3by4KIAo+IFRoYW5rcywK PiBRaWFuZwo+IAo+IE9uIFRodSwgSnVuIDI3LCAyMDE5IGF0IDM6MzAgQU0gRGFuaWVsIFZldHRl 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13:35:23 +0000 From: Ayan Halder To: Qiang Yu CC: Daniel Vetter , Brian Starkey , Raymond Smith , "maarten.lankhorst@linux.intel.com" , "maxime.ripard@bootlin.com" , "sean@poorly.run" , "airlied@linux.ie" , "dri-devel@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "malidp@foss.arm.com" , nd Subject: Re: [PATCH] drm/fourcc: Add Arm 16x16 block modifier Thread-Topic: [PATCH] drm/fourcc: Add Arm 16x16 block modifier Thread-Index: AQHVKBsKBvRwqAaS30eXmbt21cTJQqamO1MAgART94CAAAdigIAAF3uAgAOs2ACAhgdkgIAQdTcA Date: Mon, 30 Sep 2019 13:35:23 +0000 Message-ID: <20190930133522.GA16273@arm.com> References: <1561112433-5308-1-git-send-email-raymond.smith@arm.com> <20190624093233.73f3tcshewlbogli@DESKTOP-E1NTVVP.localdomain> <20190624112301.dmczf2vofxnpzqqi@DESKTOP-E1NTVVP.localdomain> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: LO2P265CA0171.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:a::15) To 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X-Forefront-PRVS: 01762B0D64 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gA74ZRy3ynND3z/758D8HZy6W/zlniN4qT8oOPEDYVFeHHHi4JO5mDMsrvp21OvYypjpiZtflkesL/0pSOl+jB1eswIEa8w8osqm+DsKyFNxfaD5CB3rMm4vwtjBVzCOsMrn7UvqA5Yxt8kEP4R6m/YkoMW6YfSAboqqF53brGcjfMvEFKw3fHJv76RObz/qmj9WUZDnrCo5rgzRuzN6MW3AOLBrh73XWKvWdJyr/LB8nScfyW/X40MREYmwGpRFLc+Od+3X0Pw/PuH0cjsQkTr5PSNyWGNF1Qn+3v8XfiTGubsl5cEShHRe8jp9zCPhW29Zg1soIkKpGtBKpjPFz6+COsDPQeEwJsHH36o+TxJgUGUEotzJGX9Truqmy/M1PUk37ql/BPkjU9TNH0ry9dHiuJ3bZtYyMud6zsdxsKPq8AR/6lMSAjnTGbVhjpP6q5WFUo1D4ib2NjgKuI+6iQ== X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Sep 2019 13:35:39.6304 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e229654d-2a12-49ff-623e-08d745ab1570 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0802MB2533 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 20, 2019 at 10:15:41AM +0800, Qiang Yu wrote: > Hi guys, >=20 > I'd like to know the status of this patch? I expect a v2 adding some > comments/macros about the high bit plan would be enough? >=20 > @Raymond & @Brian do you still need another long process to send out a > v2 patch? If so, I can help to prepare a v2 patch according to your > previous mail. Apologies for the long wait. @Raymond has left the company, so now I will be looking into it. I will respin the patch in a day or two. =20 > Thanks, > Qiang >=20 > On Thu, Jun 27, 2019 at 3:30 AM Daniel Vetter wrote: > > > > On Mon, Jun 24, 2019 at 1:23 PM Brian Starkey w= rote: > > > > > > On Mon, Jun 24, 2019 at 11:58:59AM +0200, Daniel Vetter wrote: > > > > On Mon, Jun 24, 2019 at 11:32 AM Brian Starkey wrote: > > > > > > > > > > Hi Daniel, > > > > > > > > > > On Fri, Jun 21, 2019 at 05:27:00PM +0200, Daniel Vetter wrote: > > > > > > On Fri, Jun 21, 2019 at 12:21 PM Raymond Smith wrote: > > > > > > > > > > > > > > Add the DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED modifier= to > > > > > > > denote the 16x16 block u-interleaved format used in Arm Utgar= d and > > > > > > > Midgard GPUs. > > > > > > > > > > > > > > Signed-off-by: Raymond Smith > > > > > > > --- > > > > > > > include/uapi/drm/drm_fourcc.h | 10 ++++++++++ > > > > > > > 1 file changed, 10 insertions(+) > > > > > > > > > > > > > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm= /drm_fourcc.h > > > > > > > index 3feeaa3..8ed7ecf 100644 > > > > > > > --- a/include/uapi/drm/drm_fourcc.h > > > > > > > +++ b/include/uapi/drm/drm_fourcc.h > > > > > > > @@ -743,6 +743,16 @@ extern "C" { > > > > > > > #define AFBC_FORMAT_MOD_BCH (1ULL << 11) > > > > > > > > > > > > > > /* > > > > > > > + * Arm 16x16 Block U-Interleaved modifier > > > > > > > + * > > > > > > > + * This is used by Arm Mali Utgard and Midgard GPUs. It divi= des the image > > > > > > > + * into 16x16 pixel blocks. Blocks are stored linearly in or= der, but pixels > > > > > > > + * in the block are reordered. > > > > > > > + */ > > > > > > > +#define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \ > > > > > > > + fourcc_mod_code(ARM, ((1ULL << 55) | 1)) > > > > > > > > > > > > This seems to be an extremely random pick for a new number. Wha= t's the > > > > > > thinking here? Aside from "doesnt match any of the afbc combos"= ofc. > > > > > > If you're already up to having thrown away 55bits, then it's no= t going > > > > > > to last long really :-) > > > > > > > > > > > > I think a good idea would be to reserve a bunch of the high bit= s as > > > > > > some form of index (afbc would get index 0 for backwards compat= ). And > > > > > > then the lower bits would be for free use for a given index/mod= e. And > > > > > > the first mode is probably an enumeration, where possible modes= simple > > > > > > get enumerated without further flags or anything. > > > > > > > > > > Yup, that's the plan: > > > > > > > > > > (0 << 55): AFBC > > > > > (1 << 55): This "non-category" for U-Interleaved > > > > > (1 << 54): Whatever the next category is > > > > > (3 << 54): Whatever comes after that > > > > > (1 << 53): Maybe we'll get here someday > > > > > > > > Uh, so the index would be encoded with least-significant bit first, > > > > starting from bit55 downwards? > > > > > > Yeah. > > > > > > > Clever idea, but I think this needs a > > > > macro (or at least a comment). Not sure there's a ready-made bitmas= k > > > > mirror function for this stuff, works case we can hand-code it and > > > > extend every time we need one more bit encoded. Something like: > > > > > > > > MIRROR_U32((u & (BIT(0)) << 31 | (u & BIT(1) << 30 | ...) > > > > > > > > > > Is it really worth it? People can just use the definitions as written > > > in drm_fourcc.h. I agree that we should have the high bits described > > > in a comment though. > > > > > > > And then shift that to the correct place. Probably want an > > > > > > > > ARM_MODIFIER_ENCODE(space_idx, flags) macro which assembles everyth= ing. > > > > > > > > > ... > > > > > > > > > > I didn't want to explicitly reserve some high bits, because we've= no > > > > > idea how many to reserve. This way, we can assign exactly as many > > > > > high bits as we need, when we need them. If any of the "modes" st= art > > > > > encroaching towards the high bits, we'll have to make a decision = at > > > > > that point. > > > > > > > > > > Also, this is the only U-Interleaved format (that I know of), so = it's > > > > > not worth calling bit 55 "The U-Interleaved bit" because that wou= ld be > > > > > a waste of space. It's more like the "misc" bit, but that's not a > > > > > useful name to enshrine in UAPI. > > > > > > > > Yeah that's what I meant. Also better to explicitly reserve this, i= .e. > > > > > > > > #define ARM_FBC_MODIFIER_SPACE 0 > > > > #define ARM_MISC_MODIFIER_SPACE 1 > > > > > > > > and then encode with the mirror trickery. > > > > > > > > > > I don't really see the value in that either, it's just giving > > > userspace the opportunity to depend on more stuff: more future > > > headaches. So long as the 64-bit values are stable, that should be > > > enough. > > > > If you think you need to save the few bits this potentially saves you > > over just encoding 8bit enum like in Qiang's original patch I think > > you get to type a few macros and comments ... > > > > > > > Note that isn't the same as the "not-AFBC bit", because we may we= ll > > > > > have something in the future which is neither AFBC nor "misc". > > > > > > > > > > We've been very careful in our code to enforce all > > > > > undefined/unrecognised bits to be zero, to ensure that this works= . > > > > > > > > > > > > > > > > > The other bit: Would be real good to define the format a bit mo= re > > > > > > precisely, including the layout within the tile. > > > > > > > > > > It's U-Interleaved, obviously ;-) > > > > > > > > :-) I mean full code exists in panfrost/lima, so this won't change > > > > anything really ... > > > > > > Yeah, so for us to provide a more detailed description would require > > > another lengthy loop through our legal approval process, and I'm not > > > sure we can make a strong business case (which is what we need) for > > > why this is needed. > > > > > > Of course, if someone happens to know the layout and wants to > > > contribute to this file... Then I don't know how ack/r-b would work i= n > > > that case, but I imagine the subsystem maintainer(s) might take issue > > > with us attempting to block that contribution. > > > > Well can't really take a modifier without knowing what it's for, I > > guess this is up to lima/panfrost folks then to figure out :-P > > -Daniel > > > > > > > > Thanks, > > > -Brian > > > > > > > > > > > Cheers, Daniel > > > > > > > > > > > > > > -Brian > > > > > > > > > > > > > > > > > Also ofc needs acks from lima/panfrost people since I assume th= ey'll > > > > > > be using this, too. > > > > > > > > > > > > Thanks, Daniel > > > > > > > > > > > > > + > > > > > > > +/* > > > > > > > * Allwinner tiled modifier > > > > > > > * > > > > > > > * This tiling mode is implemented by the VPU found on all A= llwinner platforms, > > > > > > > -- > > > > > > > 2.7.4 > > > > > > > > > > > > > > > > > > > > > > > > > -- > > > > > > Daniel Vetter > > > > > > Software Engineer, Intel Corporation > > > > > > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > > > > > > > > > > > > > > > > -- > > > > Daniel Vetter > > > > Software Engineer, Intel Corporation > > > > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > > > > > > > > -- > > Daniel Vetter > > Software Engineer, Intel Corporation > > +41 (0) 79 365 57 48 - http://blog.ffwll.ch