From mboxrd@z Thu Jan 1 00:00:00 1970 From: "james qian wang (Arm Technology China)" Subject: Re: [PATCH v2 1/4] drm/komeda: Add a new helper drm_color_ctm_s31_32_to_qm_n() Date: Tue, 15 Oct 2019 01:16:11 +0000 Message-ID: <20191015011604.GA26941@jamwan02-TSP300> References: <20191011054240.17782-1-james.qian.wang@arm.com> <20191011054240.17782-2-james.qian.wang@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-eopbgr140082.outbound.protection.outlook.com [40.107.14.82]) by gabe.freedesktop.org (Postfix) with ESMTPS id 720E86E1A2 for ; Tue, 15 Oct 2019 01:16:38 +0000 (UTC) In-Reply-To: Content-Language: en-US Content-ID: <95A824C58CB2A045A31C89F1918849E5@eurprd08.prod.outlook.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Ilia Mirkin Cc: nd , Ayan Halder , "Oscar Zhang (Arm Technology China)" , "Tiannan Zhu (Arm Technology China)" , Mihail Atanassov , "airlied@linux.ie" , Liviu Dudau , "Jonathan Chai (Arm Technology China)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin (Arm Technology China)" , "Channing Chen (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , "sean@poorly.run" , Ben Davis List-Id: dri-devel@lists.freedesktop.org T24gTW9uLCBPY3QgMTQsIDIwMTkgYXQgMTE6NTg6NDhBTSAtMDQwMCwgSWxpYSBNaXJraW4gd3Jv dGU6Cj4gT24gRnJpLCBPY3QgMTEsIDIwMTkgYXQgMTo0MyBBTSBqYW1lcyBxaWFuIHdhbmcgKEFy bSBUZWNobm9sb2d5IENoaW5hKQo+IDxqYW1lcy5xaWFuLndhbmdAYXJtLmNvbT4gd3JvdGU6Cj4g Pgo+ID4gQWRkIGEgbmV3IGhlbHBlciBmdW5jdGlvbiBkcm1fY29sb3JfY3RtX3MzMV8zMl90b19x bV9uKCkgZm9yIGRyaXZlciB0bwo+ID4gY29udmVydCBTMzEuMzIgc2lnbi1tYWduaXR1ZGUgdG8g UW0ubiAyJ3MgY29tcGxlbWVudCB0aGF0IHN1cHBvcnRlZCBieQo+ID4gaGFyZHdhcmUuCj4gPgo+ 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(10.255.159.31) by VE1PR08MB5069.eurprd08.prod.outlook.com (20.179.29.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2347.16; Tue, 15 Oct 2019 01:16:12 +0000 Received: from VE1PR08MB5006.eurprd08.prod.outlook.com ([fe80::40ed:7ed3:90cf:ece5]) by VE1PR08MB5006.eurprd08.prod.outlook.com ([fe80::40ed:7ed3:90cf:ece5%3]) with mapi id 15.20.2347.023; Tue, 15 Oct 2019 01:16:12 +0000 From: "james qian wang (Arm Technology China)" To: Ilia Mirkin CC: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "Jonathan Chai (Arm Technology China)" , "Julien Yin (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ayan Halder , "Tiannan Zhu (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , nd , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Davis , "Oscar Zhang (Arm Technology China)" , "Channing Chen (Arm Technology China)" , Mihail Atanassov Subject: Re: [PATCH v2 1/4] drm/komeda: Add a new helper drm_color_ctm_s31_32_to_qm_n() Thread-Topic: [PATCH v2 1/4] drm/komeda: Add a new helper drm_color_ctm_s31_32_to_qm_n() Thread-Index: AQHVf/bDNAzoDxuLVU+by7UkFix6lKdaUJkAgACbswA= Date: Tue, 15 Oct 2019 01:16:11 +0000 Message-ID: <20191015011604.GA26941@jamwan02-TSP300> References: <20191011054240.17782-1-james.qian.wang@arm.com> <20191011054240.17782-2-james.qian.wang@arm.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mutt/1.10.1 (2018-07-13) x-originating-ip: [113.29.88.7] x-clientproxiedby: HK0P153CA0018.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::30) To VE1PR08MB5006.eurprd08.prod.outlook.com (2603:10a6:803:113::31) Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=james.qian.wang@arm.com; x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0802MB2609 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 14, 2019 at 11:58:48AM -0400, Ilia Mirkin wrote: > On Fri, Oct 11, 2019 at 1:43 AM james qian wang (Arm Technology China) > wrote: > > > > Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to > > convert S31.32 sign-magnitude to Qm.n 2's complement that supported by > > hardware. > > > > Signed-off-by: james qian wang (Arm Technology China) > > --- > > drivers/gpu/drm/drm_color_mgmt.c | 23 +++++++++++++++++++++++ > > include/drm/drm_color_mgmt.h | 2 ++ > > 2 files changed, 25 insertions(+) > > > > diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_col= or_mgmt.c > > index 4ce5c6d8de99..3d533d0b45af 100644 > > --- a/drivers/gpu/drm/drm_color_mgmt.c > > +++ b/drivers/gpu/drm/drm_color_mgmt.c > > @@ -132,6 +132,29 @@ uint32_t drm_color_lut_extract(uint32_t user_input= , uint32_t bit_precision) > > } > > EXPORT_SYMBOL(drm_color_lut_extract); > > > > +/** > > + * drm_color_ctm_s31_32_to_qm_n > > + * > > + * @user_input: input value > > + * @m: number of integer bits >=20 > Is this the full 2's complement value? i.e. including the "sign" bit > of the 2's complement representation? I'd kinda assume that m =3D 32, n > =3D 0 would just get me the integer portion of this, for example. @m doesn't include "sign-bit" and for this conversion only support m <=3D 31, n <=3D 32. > > + * @n: number of fractinal bits >=20 > fractional Thank you. >=20 > > + * > > + * Convert and clamp S31.32 sign-magnitude to Qm.n 2's complement. > > + */ > > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > > + uint32_t m, uint32_t n) > > +{ > > + u64 mag =3D (user_input & ~BIT_ULL(63)) >> (32 - n); > > + bool negative =3D !!(user_input & BIT_ULL(63)); > > + s64 val; > > + > > + /* the range of signed 2s complement is [-2^n+m, 2^n+m - 1] */ >=20 > This implies that n =3D 32, m =3D 0 would actually yield a 33-bit 2's > complement number. Is that what you meant? Yes, since m doesn't include sign-bit So a Q0.32 is a 33bit value. >=20 > > + val =3D clamp_val(mag, 0, negative ? BIT(n + m) : BIT(n + m) - = 1); >=20 > I'm going to play with numpy to convince myself that this is right > (esp with the endpoints), but in the meanwhile, you probably want to > use BIT_ULL in case n + m > 32 (I don't think that's the case with any > current hardware though). Yes, you are right, I need to use BIT_ULL, and Mihail also point this out. This is function is drived from our internal s31_32_to_q2_14() >=20 > > + > > + return negative ? 0ll - val : val; >=20 > Why not just "negative ? -val : val"? will correct it. >=20 > > +} > > +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n); > > + > > /** > > * drm_crtc_enable_color_mgmt - enable color management properties > > * @crtc: DRM CRTC > > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.= h > > index d1c662d92ab7..60fea5501886 100644 > > --- a/include/drm/drm_color_mgmt.h > > +++ b/include/drm/drm_color_mgmt.h > > @@ -30,6 +30,8 @@ struct drm_crtc; > > struct drm_plane; > > > > uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_preci= sion); > > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > > + uint32_t m, uint32_t n); > > > > void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, > > uint degamma_lut_size, > > -- > > 2.20.1 > >