From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Goldschmidt Date: Tue, 15 Oct 2019 22:10:30 +0200 Subject: [U-Boot] [RFC PATCH v2 17/18] arm: socfpga: gen5: parse qspi clock from devictree In-Reply-To: <20191015201032.20156-1-simon.k.r.goldschmidt@gmail.com> References: <20191015201032.20156-1-simon.k.r.goldschmidt@gmail.com> Message-ID: <20191015201032.20156-18-simon.k.r.goldschmidt@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Remove the need for ad-hoc code for qspi speed. Signed-off-by: Simon Goldschmidt --- Changes in v2: None include/configs/socfpga_common.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d1034ac280..e4a5dfc5ef 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -137,11 +137,6 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_SPI_FLASH_MTD #endif -/* QSPI reference clock */ -#ifndef __ASSEMBLY__ -unsigned int cm_get_qspi_controller_clk_hz(void); -#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() -#endif /* * USB -- 2.20.1