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From: Ramalingam C <ramalingam.c@intel.com>
To: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [RFC 6/7] drm/i915/dsi: Add TE handler for dsi cmd mode.
Date: Wed, 16 Oct 2019 15:54:36 +0530	[thread overview]
Message-ID: <20191016102436.GD32730@intel.com> (raw)
In-Reply-To: <20191014110122.31923-7-vandita.kulkarni@intel.com>

On 2019-10-14 at 16:31:21 +0530, Vandita Kulkarni wrote:
> In case of dual link, we get the TE on slave.
> So clear the TE on slave DSI IIR.
> 
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 61 +++++++++++++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index bfb2a63504fb..d12efa72943b 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2628,6 +2628,61 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
>  		DRM_ERROR("Unexpected DE Misc interrupt\n");
>  }
>  
> +void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
> +				    u32 iir_value)
> +{
> +	enum pipe pipe = INVALID_PIPE;
> +	enum port port;
> +	enum transcoder dsi_trans;
> +	u32 val;
usually we order the declarations based on the length.
> +
> +	/*
> +	 * Incase of dual link, TE comes from DSI_1
> +	 * this is to check if dual link is enabled
> +	 */
> +	val = I915_READ(TRANS_DDI_FUNC_CTL2(TRANSCODER_DSI_0));
> +	val &= PORT_SYNC_MODE_ENABLE;
> +
> +	/*
> +	 * if dual link is enabled, then read DSI_0
> +	 * transcoder registers
> +	 */
> +	port = ((iir_value & ICL_DSI_1) && val) || (iir_value & ICL_DSI_0) ? PORT_A : PORT_B;
wrap it!? beyond 80char?
> +	dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1;
> +
> +	/* Check if DSI configured in command mode */
> +	val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans));
> +	val = (val & OP_MODE_MASK) >> 28;
Could we use a macro, like GET_OP_MODE()?
> +
> +	if (val) {
> +		DRM_ERROR("DSI trancoder not configured in command mode\n");
> +		return;
> +	}
> +
> +	/* Get PIPE for handling VBLANK event */
> +	val = I915_READ(TRANS_DDI_FUNC_CTL(dsi_trans));
> +	switch (val & TRANS_DDI_EDP_INPUT_MASK) {
> +	case TRANS_DDI_EDP_INPUT_A_ON:
> +		pipe = PIPE_A;
> +		break;
> +	case TRANS_DDI_EDP_INPUT_B_ONOFF:
> +		pipe = PIPE_B;
> +		break;
> +	case TRANS_DDI_EDP_INPUT_C_ONOFF:
> +		pipe = PIPE_C;
> +		break;
> +	default:
> +		DRM_ERROR("Invalid PIPE\n");
> +	}
> +
> +	/* clear TE in dsi IIR */
> +	port = (iir_value & ICL_DSI_1) ? PORT_B : PORT_A;
> +	val = I915_READ(ICL_DSI_INTR_IDENT_REG(port));
> +	I915_WRITE((ICL_DSI_INTR_IDENT_REG(port)), val);
extra () around ICL_DSI_INTR_IDENT_REG(port)
> +
> +	drm_handle_vblank(&dev_priv->drm, pipe);
> +}
> +
>  static irqreturn_t
>  gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
>  {
> @@ -2692,6 +2747,12 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
>  				found = true;
>  			}
>  
> +			if ((INTEL_GEN(dev_priv) >= 11) &&
> +				(iir & (ICL_DSI_0 | ICL_DSI_1))) {
alignment.

-Ram
> +				gen11_dsi_te_interrupt_handler(dev_priv, iir);
> +				found = true;
> +			}
> +
>  			if (!found)
>  				DRM_ERROR("Unexpected DE Port interrupt\n");
>  		}
> -- 
> 2.21.0.5.gaeb582a
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  parent reply	other threads:[~2019-10-16 10:24 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-14 11:01 [RFC 0/7] Add mipi dsi command mode support Vandita Kulkarni
2019-10-14 11:01 ` [RFC 1/7] drm/i915/dsi: Define command mode registers Vandita Kulkarni
2019-10-14 16:18   ` Ramalingam C
2019-10-15  7:52     ` Kulkarni, Vandita
2019-10-15  7:07   ` Jani Nikula
2019-10-15  7:50     ` Kulkarni, Vandita
2019-10-14 11:01 ` [RFC 2/7] drm/i915/dsi: Configure transcoder operation for command mode Vandita Kulkarni
2019-10-15 18:35   ` Jani Nikula
2019-10-24 11:37   ` Jani Nikula
2019-10-24 11:37     ` [Intel-gfx] " Jani Nikula
2019-10-24 11:52     ` Kulkarni, Vandita
2019-10-24 11:52       ` [Intel-gfx] " Kulkarni, Vandita
2019-10-14 11:01 ` [RFC 3/7] drm/i915/dsi: Add vblank calculation " Vandita Kulkarni
2019-10-15 18:45   ` Jani Nikula
2019-10-14 11:01 ` [RFC 4/7] drm/i915/dsi: Helper to find dsi encoder in cmd mode Vandita Kulkarni
2019-10-15 19:20   ` Jani Nikula
2019-10-16 13:27     ` Kulkarni, Vandita
2019-10-24  9:07       ` Jani Nikula
2019-10-24  9:07         ` [Intel-gfx] " Jani Nikula
2019-10-24  9:11         ` Jani Nikula
2019-10-24  9:11           ` [Intel-gfx] " Jani Nikula
2019-10-14 11:01 ` [RFC 5/7] drm/i915/dsi: Configure TE interrupt for " Vandita Kulkarni
2019-10-16  9:56   ` Ramalingam C
2019-10-24 11:34   ` Jani Nikula
2019-10-24 11:34     ` [Intel-gfx] " Jani Nikula
2019-10-14 11:01 ` [RFC 6/7] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
2019-10-15  8:28   ` Kulkarni, Vandita
2019-10-16 10:24   ` Ramalingam C [this message]
2019-10-16 12:46     ` Kulkarni, Vandita
2019-10-14 11:01 ` [RFC 7/7] drm/i915/dsi: Initiate frame request in " Vandita Kulkarni
2019-10-16 10:14   ` Ramalingam C
2019-10-16 12:37     ` Kulkarni, Vandita
2019-10-14 16:21 ` ✗ Fi.CI.CHECKPATCH: warning for Add mipi dsi command mode support Patchwork
2019-10-14 16:24 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-10-14 17:07 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-15  0:42 ` ✓ Fi.CI.IGT: " Patchwork

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