From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31525CA9EB9 for ; Wed, 23 Oct 2019 15:40:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0454A21928 for ; Wed, 23 Oct 2019 15:40:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="olanxhdX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406846AbfJWPk1 (ORCPT ); Wed, 23 Oct 2019 11:40:27 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:59836 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406841AbfJWPk1 (ORCPT ); Wed, 23 Oct 2019 11:40:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=15znUTheX3hlcNilQtbUhzbHXYgrjg4e2vdUTc1SahE=; b=olanxhdXsw5ZEvvZTD6ifaDlLv 1yF/8BJLAJfHTbG4ccmRz2qgl0iuWPhwqavirOM3SPrXsDLuDMAFcn+lcwt0zhihspoZUzXAqga3e 8GoQHiUSA00iXRYVqXsi0VdcpBxxLx2rW54991rGeqy+IwxgH1qtmKy4bxE+UFi0xSKY=; Received: from andrew by vps0.lunn.ch with local (Exim 4.92.2) (envelope-from ) id 1iNIkK-0007OU-0f; Wed, 23 Oct 2019 17:40:24 +0200 Date: Wed, 23 Oct 2019 17:40:24 +0200 From: Andrew Lunn To: Martin Fuzzey Cc: netdev@vger.kernel.org Subject: Re: [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag Message-ID: <20191023154024.GC13748@lunn.ch> References: <1571823889-16834-1-git-send-email-martin.fuzzey@flowbird.group> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1571823889-16834-1-git-send-email-martin.fuzzey@flowbird.group> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, Oct 23, 2019 at 11:44:24AM +0200, Martin Fuzzey wrote: > The LAN8740, like the 8720, also requires a reset after enabling clock. > The datasheet [1] 3.8.5.1 says: > "During a Hardware reset, an external clock must be supplied > to the XTAL1/CLKIN signal." > > I have observed this issue on a custom i.MX6 based board with > the LAN8740A. > > [1] http://ww1.microchip.com/downloads/en/DeviceDoc/8740a.pdf > > Signed-off-by: Martin Fuzzey Reviewed-by: Andrew Lunn Andrew