From: Bjorn Helgaas <helgaas@kernel.org>
To: Carlo Pisani <carlojpisani@gmail.com>
Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux@yadro.com
Subject: Re: Oxford Semiconductor Ltd OX16PCI954 - weird dmesg
Date: Fri, 25 Oct 2019 11:37:24 -0500 [thread overview]
Message-ID: <20191025163724.GA144828@google.com> (raw)
In-Reply-To: <CA+QBN9AR+drU0zC2-C2zVetTv0GxNs0KRF1BG51mwcRyu=TxpA@mail.gmail.com>
On Fri, Oct 25, 2019 at 04:33:13PM +0200, Carlo Pisani wrote:
> pci_bus 0000:00: root bus resource [mem 0x50000000-0x5fffffff]
> pci_bus 0000:00: root bus resource [io 0x18800000-0x188fffff]
> pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
> pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
> pci 0000:00:00.0: [Firmware Bug]: reg 0x14: invalid BAR (can't size)
> pci 0000:00:00.0: [Firmware Bug]: reg 0x18: invalid BAR (can't size)
> pci 0000:00:04.0: BAR 0: assigned [mem 0x50000000-0x5000ffff]
> pci 0000:00:05.0: BAR 1: assigned [mem 0x50010000-0x50010fff]
> pci 0000:00:05.0: BAR 3: assigned [mem 0x50011000-0x50011fff]
> pci 0000:00:0a.0: BAR 1: assigned [mem 0x50012000-0x50012fff]
> pci 0000:00:0a.0: BAR 3: assigned [mem 0x50013000-0x50013fff]
> pci 0000:00:02.0: BAR 0: assigned [io 0x18800000-0x188000ff]
> pci 0000:00:02.0: BAR 1: assigned [mem 0x50014000-0x500140ff]
> pci 0000:00:03.0: BAR 0: assigned [io 0x18800400-0x188004ff]
> pci 0000:00:03.0: BAR 1: assigned [mem 0x50014100-0x500141ff]
> pci 0000:00:05.0: BAR 0: assigned [io 0x18800800-0x1880081f]
> pci 0000:00:05.0: BAR 2: assigned [io 0x18800820-0x1880083f]
> pci 0000:00:0a.0: BAR 0: assigned [io 0x18800840-0x1880085f]
> pci 0000:00:0a.0: BAR 2: assigned [io 0x18800860-0x1880087f]
>
>
> 00:00.0 Non-VGA unclassified device: Integrated Device Technology,
> Inc. Device 0000
> Subsystem: Device 0214:011d
> Flags: bus master, 66MHz, medium devsel, latency 60, IRQ 140
> Memory at <unassigned> (32-bit, prefetchable)
> I/O ports at <ignored>
> I/O ports at <ignored>
>
> 00:02.0 Ethernet controller: VIA Technologies, Inc. VT6105/VT6106S
> [Rhine-III] (rev 86)
> Subsystem: AST Research Inc Device 086c
> Flags: bus master, stepping, medium devsel, latency 64, IRQ 142
> I/O ports at 18800000 [size=256]
> Memory at 50014000 (32-bit, non-prefetchable) [size=256]
> Capabilities: [40] Power Management version 2
> Kernel driver in use: via-rhine
>
> 00:03.0 Ethernet controller: VIA Technologies, Inc. VT6105/VT6106S
> [Rhine-III] (rev 86)
> Subsystem: AST Research Inc Device 086c
> Flags: bus master, stepping, medium devsel, latency 64, IRQ 143
> I/O ports at 18800400 [size=256]
> Memory at 50014100 (32-bit, non-prefetchable) [size=256]
> Capabilities: [40] Power Management version 2
> Kernel driver in use: via-rhine
>
> 00:04.0 Network controller: Atheros Communications Inc. Device 0029 (rev 01)
> Subsystem: Atheros Communications Inc. Device 2091
> Flags: bus master, 66MHz, medium devsel, latency 168, IRQ 142
> Memory at 50000000 (32-bit, non-prefetchable) [size=64K]
> Capabilities: [44] Power Management version 2
> Kernel driver in use: ath9k
>
> 00:05.0 Serial controller: Oxford Semiconductor Ltd OX16PCI954 (Quad
> 16950 UART) function 0 (Uart) (rev 01) (prog-if 06 [)
> Subsystem: Oxford Semiconductor Ltd Device 0000
> Flags: medium devsel, IRQ 143
> I/O ports at 18800800 [size=32]
> Memory at 50010000 (32-bit, non-prefetchable) [size=4K]
> I/O ports at 18800820 [size=32]
> Memory at 50011000 (32-bit, non-prefetchable) [size=4K]
> Capabilities: [40] Power Management version 2
> Kernel driver in use: serial
>
> 00:05.1 Non-VGA unclassified device: Oxford Semiconductor Ltd
> OX16PCI954 (Quad 16950 UART) function 0 (Disabled) (rev 01)
> Subsystem: Oxford Semiconductor Ltd Device 0000
> Flags: medium devsel, IRQ 143
> I/O ports at <unassigned> [disabled]
> I/O ports at <unassigned> [disabled]
> I/O ports at <unassigned> [disabled]
> Capabilities: [40] Power Management version 2
>
> 00:0a.0 Serial controller: Oxford Semiconductor Ltd OX16PCI954 (Quad
> 16950 UART) function 0 (Uart) (rev 01) (prog-if 06 [)
> Subsystem: Oxford Semiconductor Ltd Device 0000
> Flags: medium devsel, IRQ 140
> I/O ports at 18800840 [size=32]
> Memory at 50012000 (32-bit, non-prefetchable) [size=4K]
> I/O ports at 18800860 [size=32]
> Memory at 50013000 (32-bit, non-prefetchable) [size=4K]
> Capabilities: [40] Power Management version 2
> Kernel driver in use: serial
>
> 00:0a.1 Non-VGA unclassified device: Oxford Semiconductor Ltd
> OX16PCI954 (Quad 16950 UART) function 0 (Disabled) (rev 01)
> Subsystem: Oxford Semiconductor Ltd Device 0000
> Flags: medium devsel, IRQ 140
> I/O ports at <unassigned> [disabled]
> I/O ports at <unassigned> [disabled]
> I/O ports at <unassigned> [disabled]
> Capabilities: [40] Power Management version 2
>
>
> hi guys
> I have a couple of miniPCI Oxford Semiconductor Ltd OX16PCI954 cards
> installed, and the dmesg looks weird
>
> espeially these lines
> pci_bus 0000:00: root bus resource [mem 0x50000000-0x5fffffff]
> pci_bus 0000:00: root bus resource [io 0x18800000-0x188fffff]
> pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
> pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
These resources are supplied to the PCI core, probably from DT. A
complete dmesg log would show more.
> pci 0000:00:00.0: [Firmware Bug]: reg 0x14: invalid BAR (can't size)
> pci 0000:00:00.0: [Firmware Bug]: reg 0x18: invalid BAR (can't size)
> besides, I am experimenting crashes happening in burn-in tests, and I
> do suspect it's something related to the newly added cards
If you take the cards out do the lines you mention above change?
What sort of crashes do you see? I assume it doesn't crash without
the cards?
It *looks* like the miniPCI cards should be these devices:
00:05.0 Serial controller: Oxford Semiconductor Ltd OX16PCI954 (Quad 16950 UART) function 0 (Uart) (rev 01) (prog-if 06 [)
00:0a.0 Serial controller: Oxford Semiconductor Ltd OX16PCI954 (Quad 16950 UART) function 0 (Uart) (rev 01) (prog-if 06 [)
which are unrelated to the 00:00.0 device with the broken BAR.
next prev parent reply other threads:[~2019-10-25 16:37 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-24 17:11 [PATCH v6 00/30] PCI: Allow BAR movement during hotplug Sergey Miroshnichenko
2019-10-24 17:11 ` Sergey Miroshnichenko
2019-10-24 17:11 ` [PATCH v6 01/30] PCI: Fix race condition in pci_enable/disable_device() Sergey Miroshnichenko
2019-10-24 17:11 ` Sergey Miroshnichenko
2019-10-25 14:33 ` Oxford Semiconductor Ltd OX16PCI954 - weird dmesg Carlo Pisani
2019-10-25 16:37 ` Bjorn Helgaas [this message]
2019-10-24 17:12 ` [PATCH v6 02/30] PCI: Enable bridge's I/O and MEM access for hotplugged devices Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 03/30] PCI: hotplug: Add a flag for the movable BARs feature Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-27 18:18 ` kbuild test robot
2019-10-24 17:12 ` [PATCH v6 04/30] PCI: Define PCI-specific version of the release_child_resources() Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 05/30] PCI: hotplug: movable BARs: Fix reassigning the released bridge windows Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 06/30] PCI: hotplug: movable BARs: Recalculate all bridge windows during rescan Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 07/30] PCI: hotplug: movable BARs: Don't disable the released bridge windows Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 08/30] PCI: hotplug: movable BARs: Don't allow added devices to steal resources Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 09/30] PCI: Include fixed and immovable BARs into the bus size calculating Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 10/30] PCI: Prohibit assigning BARs and bridge windows to non-direct parents Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 11/30] PCI: hotplug: movable BARs: Try to assign unassigned resources only once Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 12/30] PCI: hotplug: movable BARs: Calculate immovable parts of bridge windows Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 13/30] PCI: hotplug: movable BARs: Compute limits for relocated " Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 14/30] PCI: Make sure bridge windows include their fixed BARs Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 15/30] PCI: Fix assigning the fixed prefetchable resources Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 16/30] PCI: hotplug: movable BARs: Assign fixed and immovable BARs before others Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 17/30] PCI: hotplug: movable BARs: Don't reserve IO/mem bus space Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 18/30] PCI: hotplug: Configure MPS for hot-added bridges during bus rescan Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 19/30] PCI: hotplug: movable BARs: Ignore the MEM BAR offsets from bootloader Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 20/30] powerpc/pci: Fix crash with enabled movable BARs Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-25 1:22 ` Alexey Kardashevskiy
2019-10-25 1:22 ` Alexey Kardashevskiy
2019-10-24 17:12 ` [PATCH v6 21/30] powerpc/pci: Access PCI config space directly w/o pci_dn Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 22/30] powerpc/pci: Create pci_dn on demand Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 23/30] powerpc/pci: hotplug: Add support for movable BARs Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 24/30] powerpc/powernv/pci: Suppress an EEH error when reading an empty slot Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 25/30] PNP: Don't reserve BARs for PCI when enabled movable BARs Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-27 17:40 ` kbuild test robot
2019-10-27 17:40 ` kbuild test robot
2019-10-27 17:40 ` kbuild test robot
2019-10-24 17:12 ` [PATCH v6 26/30] PCI: hotplug: movable BARs: Enable the feature by default Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 27/30] nvme-pci: Handle movable BARs Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 28/30] PCI/portdrv: Declare support of " Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 29/30] PCI: pciehp: movable BARs: Trigger a domain rescan on hp events Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
2019-10-24 17:12 ` [PATCH v6 30/30] Revert "powerpc/powernv/pci: Work around races in PCI bridge enabling" Sergey Miroshnichenko
2019-10-24 17:12 ` Sergey Miroshnichenko
[not found] <CA+QBN9C_o8HanAzXpDUN410g2o5+xfx64pbX3_VHVDKcj5N3kA@mail.gmail.com>
2019-10-28 17:13 ` Oxford Semiconductor Ltd OX16PCI954 - weird dmesg Bjorn Helgaas
2019-10-28 16:37 ` Carlo Pisani
2019-10-28 18:48 ` Bjorn Helgaas
2019-10-28 18:06 ` Carlo Pisani
2019-10-28 19:43 ` Bjorn Helgaas
2019-10-28 18:49 ` Carlo Pisani
2019-11-04 14:59 ` Bjorn Helgaas
2019-10-28 16:46 ` Carlo Pisani
[not found] <CA+QBN9AzXHifP4=F1O1jjbGP0yNxBZeTPgPJvpcKFb9Z4f30KA@mail.gmail.com>
2019-11-04 15:58 ` Bjorn Helgaas
[not found] <CA+QBN9B4qfxpEa69TB=+MngG9bN0puwByAeGCMxk_Y7fgaKhpQ@mail.gmail.com>
2019-11-04 16:07 ` Bjorn Helgaas
[not found] <CA+QBN9D4bckEZmNhLJPBmr92St1W2GGyazLGR9kANFk2cfV8Pg@mail.gmail.com>
2019-11-04 16:30 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191025163724.GA144828@google.com \
--to=helgaas@kernel.org \
--cc=carlojpisani@gmail.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux@yadro.com \
--cc=linuxppc-dev@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.