From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Received: from herzl.nuvoton.co.il (212.199.177.27.static.012.net.il [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 471zn03qwRzDqcV for ; Tue, 29 Oct 2019 02:54:42 +1100 (AEDT) Received: from taln60.nuvoton.co.il (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id x9SFs4oj001372; Mon, 28 Oct 2019 17:54:05 +0200 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 704636026D; Mon, 28 Oct 2019 17:54:04 +0200 (IST) From: Tomer Maimon To: p.zabel@pengutronix.de, robh+dt@kernel.org, mark.rutland@arm.com, yuenn@google.com, venture@google.com, benjaminfair@google.com, avifishman70@gmail.com, joel@jms.id.au Cc: openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Tomer Maimon Subject: [PATCH v2 0/3] reset: npcm: add NPCM reset driver support Date: Mon, 28 Oct 2019 17:54:00 +0200 Message-Id: <20191028155403.134126-1-tmaimon77@gmail.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Oct 2019 15:54:45 -0000 This patch set adds reset controller support for the Nuvoton NPCM Baseboard Management Controller (BMC). Apart of controlling all NPCM BMC reset module lines the NPCM reset driver support NPCM BMC software reset to restarting the NPCM BMC. Supporting NPCM USB-PHY reset as follow: NPCM BMC USB-PHY connected to two modules USB device (UDC) and USB host. If we will restart the USB-PHY at the UDC probe and later the USB host probe will restart USB-PHY again it will disable the UDC and vice versa. The solution is to reset the USB-PHY at the reset probe stage before the UDC and the USB host are initializing. NPCM reset driver tested on NPCM750 evaluation board. Addressed comments from:. - kbuild test robot : https://lkml.org/lkml/2019/10/27/768 Changes since version 1: - Check if gcr_regmap parameter initialized before using it. Tomer Maimon (3): dt-binding: reset: add NPCM reset controller documentation dt-bindings: reset: Add binding constants for NPCM7xx reset controller reset: npcm: add NPCM reset controller driver .../bindings/reset/nuvoton,npcm-reset.txt | 35 +++ drivers/reset/Kconfig | 7 + drivers/reset/Makefile | 1 + drivers/reset/reset-npcm.c | 275 ++++++++++++++++++ .../dt-bindings/reset/nuvoton,npcm7xx-reset.h | 82 ++++++ 5 files changed, 400 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt create mode 100644 drivers/reset/reset-npcm.c create mode 100644 include/dt-bindings/reset/nuvoton,npcm7xx-reset.h -- 2.22.0