From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] clk: tegra20/30: Optimize PLLX configuration restoring
Date: Tue, 29 Oct 2019 14:17:14 +0100 [thread overview]
Message-ID: <20191029131714.GD508460@ulmo> (raw)
In-Reply-To: <20190922215203.32103-1-digetx@gmail.com>
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On Mon, Sep 23, 2019 at 12:52:03AM +0300, Dmitry Osipenko wrote:
> There is no need to re-configure PLLX if its configuration in unchanged
> on return from suspend / cpuidle, this saves 300us if PLLX is already
> enabled (common case for cpuidle).
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/clk/tegra/clk-tegra20.c | 25 ++++++++++++++++---------
> drivers/clk/tegra/clk-tegra30.c | 25 ++++++++++++++++---------
> 2 files changed, 32 insertions(+), 18 deletions(-)
Applied to for-5.5/clk, thanks.
Thierry
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prev parent reply other threads:[~2019-10-29 13:17 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-22 21:52 [PATCH v1] clk: tegra20/30: Optimize PLLX configuration restoring Dmitry Osipenko
2019-10-28 14:47 ` Peter De Schrijver
2019-10-28 14:47 ` Peter De Schrijver
2019-10-29 13:17 ` Thierry Reding [this message]
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