From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C28B5CA9EC5 for ; Wed, 30 Oct 2019 14:47:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9122D2087E for ; Wed, 30 Oct 2019 14:47:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726259AbfJ3OrZ (ORCPT ); Wed, 30 Oct 2019 10:47:25 -0400 Received: from mga07.intel.com ([134.134.136.100]:44524 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726175AbfJ3OrZ (ORCPT ); Wed, 30 Oct 2019 10:47:25 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Oct 2019 07:47:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,247,1569308400"; d="scan'208";a="225353521" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga004.fm.intel.com with ESMTP; 30 Oct 2019 07:47:22 -0700 Received: from andy by smile with local (Exim 4.92.2) (envelope-from ) id 1iPpFq-0007K0-8o; Wed, 30 Oct 2019 16:47:22 +0200 Date: Wed, 30 Oct 2019 16:47:22 +0200 From: Andy Shevchenko To: Hans de Goede Cc: Linus Walleij , "open list:GPIO SUBSYSTEM" , Mika Westerberg Subject: Re: [PATCH v1] pinctrl: baytrail: Move IRQ valid mask initialization to a dedicated callback Message-ID: <20191030144722.GZ32742@smile.fi.intel.com> References: <20191025140621.43417-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Wed, Oct 30, 2019 at 02:11:50PM +0100, Hans de Goede wrote: > On 30-10-2019 13:42, Linus Walleij wrote: > > On Wed, Oct 30, 2019 at 10:31 AM Hans de Goede wrote: > > > TL;DR: commit 88583e340a0e ("pinctrl: intel: baytrail: Pass irqchip when adding gpiochip") > > > breaks a bunch of stuff and should be dropped from pinctrl/intel.git/for-next > > > and this needs some more work before it is ready for mainline. > > > > I don't know if that is such a good idea if this is a global problem, > > like something that would potentially disturb any ACPI-based > > GPIO chip. We might leave something else broken even if we > > fix the issue locally. > > Right, I did a quick check and at least these x86 pinctrl drivers > all 3 have this ordering problem once the irq chip registration is > moved to the gpiochip_add_data() call. > > drivers/pinctrl/intel/pinctrl-baytrail.c > drivers/pinctrl/intel/pinctrl-cherryview.c > drivers/pinctrl/intel/pinctrl-intel.c > drivers/pinctrl/pinctrl-amd.c Hmm.. do we have cherryview broken in next / vanilla? > > And it seems that drivers/gpio/gpio-merrifield.c is already > suffering from this problem in 5.4! > > So some more generic solution would be ideal... -- With Best Regards, Andy Shevchenko