From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE273C43141 for ; Tue, 19 Nov 2019 05:52:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 76D3C20862 for ; Tue, 19 Nov 2019 05:52:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1574142739; bh=5DLZxx+XkJtsu61XyqZjuPUSFXnrVTk7JiK1SjKEoNE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=IAQmIQ35hwwBaJQiCReX7OzO3Cm6lLqCkMN06A8a4eD3ZexZEFrBgtUuHthzJjAuT U8wYMgDD4yTvztv/XnSZ+ypsepUOzWReaxaaMBwalXEadEAiLMpBFlLaspTo5Q0kBN bq+seyMUbeu9Q3+gciKIo9/ffOsgixi7ip3FGh1M= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731557AbfKSFwS (ORCPT ); Tue, 19 Nov 2019 00:52:18 -0500 Received: from mail.kernel.org ([198.145.29.99]:49892 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731886AbfKSFwN (ORCPT ); Tue, 19 Nov 2019 00:52:13 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B671920862; Tue, 19 Nov 2019 05:52:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1574142732; bh=5DLZxx+XkJtsu61XyqZjuPUSFXnrVTk7JiK1SjKEoNE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Yhz1ejHIJ/vQbJRlNqvn9hbIuMDx12BkUfP0qXbQqwlAlm85hluJfCCXiTcBhcJ3C YZ2TapXFGRyqkEYtSRT8HwWSVd0VjfWDosIvtjzKbcfM60Znnrgi5B75GNOZrCbOT+ pklBwQTgdu8mjh2g6JU3hmM9AJARzoKO/mnuBl94= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Heiko Stuebner , Sasha Levin Subject: [PATCH 4.14 182/239] ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock Date: Tue, 19 Nov 2019 06:19:42 +0100 Message-Id: <20191119051334.717488875@linuxfoundation.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191119051255.850204959@linuxfoundation.org> References: <20191119051255.850204959@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Heiko Stuebner [ Upstream commit a2df0984e73fd9e1dad5fc3f1c307ec3de395e30 ] It is good practice to make the setting of gpio-pinctrls explicitly in the devicetree, and in this case even necessary. Rockchip boards start with iomux settings set to gpio for most pins and while the linux pinctrl driver also implicitly sets the gpio function if a pin is requested as gpio that is not necessarily true for other drivers. The issue in question stems from uboot, where the sdmmc_pwr pin is set to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage loader. The regulator controlled by the pin is active-low though, so when the dwmmc hw-block sets its enabled bit, it actually disables the regulator. By changing the pin back to gpio we fix that behaviour. Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- arch/arm/boot/dts/rk3188-radxarock.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index 53d6fc2fdbce8..541a798d3d202 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -130,6 +130,8 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; startup-delay-us = <100000>; vin-supply = <&vcc_io>; }; @@ -348,6 +350,12 @@ }; }; + sd0 { + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = ; + }; + }; + usb { host_vbus_drv: host-vbus-drv { rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>; -- 2.20.1