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From: Ingo Molnar <mingo@kernel.org>
To: Jan Beulich <jbeulich@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	the arch/x86 maintainers <x86@kernel.org>,
	Andy Lutomirski <luto@kernel.org>
Subject: Re: [Xen-devel] [PATCH v3] x86/stackframe/32: repair 32-bit Xen PV
Date: Tue, 19 Nov 2019 09:03:00 +0100	[thread overview]
Message-ID: <20191119080300.GA56452@gmail.com> (raw)
In-Reply-To: <0fad341f-b7f5-f859-d55d-f0084ee7087e@suse.com>


* Jan Beulich <jbeulich@suse.com> wrote:

> Once again RPL checks have been introduced which don't account for a
> 32-bit kernel living in ring 1 when running in a PV Xen domain. The
> case in FIXUP_FRAME has been preventing boot. Adjust BUG_IF_WRONG_CR3
> as well to guard against future uses of the macro on a code path
> reachable when running in PV mode under Xen; I have to admit that I
> stopped at a certain point trying to figure out whether there are
> present ones.
> 
> Fixes: 3c88c692c287 ("x86/stackframe/32: Provide consistent pt_regs")
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> v3: Move USER_SEGMENT_RPL_MASK definition to segment.h. Further explain
>     the BUG_IF_WRONG_CR3 adjustment.
> v2: Avoid #ifdef and alter comment along the lines of Andy's suggestion.

Since the breakage was introduced in v5.3, I've added a Cc: stable line.

Thanks,

	Ingo

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  reply	other threads:[~2019-11-19  8:03 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-18 15:21 [Xen-devel] [PATCH v3] x86/stackframe/32: repair 32-bit Xen PV Jan Beulich
2019-11-19  8:03 ` Ingo Molnar [this message]
2019-11-19 21:01 ` [tip: x86/urgent] x86/stackframe/32: Repair " tip-bot2 for Jan Beulich

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