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From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: event <event.riga@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] irq-gic: select all CPU's selected in interrupt affinity settings
Date: Tue, 19 Nov 2019 23:36:33 +0000	[thread overview]
Message-ID: <20191119233633.GG25745@shell.armlinux.org.uk> (raw)
In-Reply-To: <CAPaFbat4MM0=iVB-VazTK9=2qRebAgEN4euYCTESRo3yfx75Kw@mail.gmail.com>

On Tue, Nov 19, 2019 at 11:12:26PM +0000, event wrote:
> So far only a CPU selected with top affinity bit was selected. This
> resulted in all interrupts
> being processed by CPU0 by default despite "FF" default affinity
> setting for all interrupts

Have you checked whether this causes _ALL_ CPUs in the mask to be
delivered a single interrupt, thereby causing _ALL_ CPUs to be
slowed down and hit the same locks at the same time.

> ---
>  drivers/irqchip/irq-gic.c | 27 ++++++++++++++++-----------
>  1 file changed, 16 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index 30ab62334..e6c6451ea 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -331,25 +331,30 @@ static int gic_set_affinity(struct irq_data *d,
> const struct cpumask *mask_val,
>  {
>   void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
>   unsigned int cpu, shift = (gic_irq(d) % 4) * 8;
> - u32 val, mask, bit;
> + u32 val, reg_mask, bits = 0;
>   unsigned long flags;
> + const struct cpumask* cpu_mask;
> 
> - if (!force)
> - cpu = cpumask_any_and(mask_val, cpu_online_mask);
> + if (force)
> + cpu_mask = mask_val;
>   else
> - cpu = cpumask_first(mask_val);
> + cpu_mask = cpu_online_mask;
> 
> - if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
> - return -EINVAL;
> + for_each_cpu_and(cpu, mask_val, cpu_mask) {
> + if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) {
> + return -EINVAL;
> + }
> + bits |= gic_cpu_map[cpu];
> + }
> 
>   gic_lock_irqsave(flags);
> - mask = 0xff << shift;
> - bit = gic_cpu_map[cpu] << shift;
> - val = readl_relaxed(reg) & ~mask;
> - writel_relaxed(val | bit, reg);
> + reg_mask = 0xff << shift;
> + bits <<= shift;
> + val = readl_relaxed(reg) & ~reg_mask;
> + writel_relaxed(val | bits, reg);
>   gic_unlock_irqrestore(flags);
> 
> - irq_data_update_effective_affinity(d, cpumask_of(cpu));
> + irq_data_update_effective_affinity(d, cpu_mask);
> 
>   return IRQ_SET_MASK_OK_DONE;
>  }
> --
> 2.17.1
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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  reply	other threads:[~2019-11-19 23:36 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-19 23:12 [PATCH] irq-gic: select all CPU's selected in interrupt affinity settings event
2019-11-19 23:36 ` Russell King - ARM Linux admin [this message]
2019-11-20  0:24   ` Leonid Movshovich
2019-11-20  1:15     ` Robin Murphy
2019-11-20 10:44       ` Leonid Movshovich
2019-11-20 10:50         ` Russell King - ARM Linux admin
2019-11-20 11:25           ` Leonid Movshovich
2019-11-20 13:33             ` Robin Murphy
2019-11-20 13:58               ` Russell King - ARM Linux admin
2019-11-20 15:07                 ` Leonid Movshovich
2019-11-20 17:13                   ` Russell King - ARM Linux admin
2019-11-20 17:54                     ` Leonid Movshovich
2019-11-20 15:04       ` Marc Zyngier
2019-11-20 15:28         ` Leonid Movshovich
2019-11-20 15:39           ` Marc Zyngier
2019-11-20 16:45             ` Leonid Movshovich
2019-11-20 17:17               ` Russell King - ARM Linux admin
2019-11-20 17:37                 ` Leonid Movshovich
2019-11-20 17:55                   ` Russell King - ARM Linux admin
2019-11-20 17:14           ` Russell King - ARM Linux admin
2019-11-20 17:48             ` Leonid Movshovich

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