From: Ard Biesheuvel <ardb@kernel.org>
To: devicetree@vger.kernel.org
Cc: robh+dt@kernel.org, thomas.lendacky@amd.com,
suravee.suthikulpanit@amd.com, brijeshkumar.singh@amd.com,
will@kernel.org, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH 5/6] dt: amd-seattle: add a description of the PCIe SMMU
Date: Mon, 25 Nov 2019 23:51:09 +0100 [thread overview]
Message-ID: <20191125225110.10924-6-ardb@kernel.org> (raw)
In-Reply-To: <20191125225110.10924-1-ardb@kernel.org>
Add a description of the SMMU that covers the PCIe host bridge
on AMD Seattle.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index 9fa6890fca35..7484ea695262 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -239,6 +239,16 @@
<0x02000000 0x00 0x40000000 0x00 0x40000000 0x00 0x80000000>,
/* 64-bit MMIO (size= 508G) */
<0x03000000 0x01 0x00000000 0x01 0x00000000 0x7f 0x00000000>;
+ iommu-map = <0x0 &pcie_smmu 0x0 0x10000>;
+ };
+
+ pcie_smmu: smmu@e0a00000 {
+ compatible = "arm,mmu-401";
+ reg = <0 0xe0a00000 0 0x10000>;
+ #global-interrupts = <1>;
+ interrupts = <0 333 4>, <0 333 4>;
+ #iommu-cells = <1>;
+ dma-coherent;
};
/* Perf CCN504 PMU */
--
2.17.1
next prev parent reply other threads:[~2019-11-25 22:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-25 22:51 [PATCH 0/6] dt: amd-seattle: update SMMU and PCIe descriptions Ard Biesheuvel
2019-11-25 22:51 ` [PATCH 1/6] dt: amd-seattle: remove Husky platform Ard Biesheuvel
2019-11-25 22:51 ` [PATCH 2/6] dt: amd-seattle: remove Overdrive revision A0 support Ard Biesheuvel
2019-11-25 22:51 ` [PATCH 3/6] dt: amd-seattle: upgrade AMD Seattle XGBE to new SMMU binding Ard Biesheuvel
2019-11-25 22:51 ` [PATCH 4/6] dt: amd-seattle: fix PCIe legacy interrupt routing Ard Biesheuvel
2019-11-25 22:51 ` Ard Biesheuvel [this message]
2019-11-25 22:51 ` [PATCH 6/6] dt: amd-seattle: add description of the SATA/CCP SMMUs Ard Biesheuvel
2019-11-26 8:46 ` [PATCH 0/6] dt: amd-seattle: update SMMU and PCIe descriptions Ard Biesheuvel
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