From: Ard Biesheuvel <ardb@kernel.org>
To: devicetree@vger.kernel.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
Brijesh Singh <brijeshkumar.singh@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v2 7/8] dt: amd-seattle: disable IPMI controller and some GPIO blocks on B0
Date: Tue, 26 Nov 2019 12:43:18 +0100 [thread overview]
Message-ID: <20191126114319.2755-8-ardb@kernel.org> (raw)
In-Reply-To: <20191126114319.2755-1-ardb@kernel.org>
Disable some peripherals that are not usable on B0 silicon based
Overdrives.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
index be8db5758c94..899ffcf9da36 100644
--- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
+++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
@@ -36,14 +36,6 @@
status = "ok";
};
-&gpio2 {
- status = "ok";
-};
-
-&gpio3 {
- status = "ok";
-};
-
&gpio4 {
status = "ok";
};
@@ -83,10 +75,6 @@
};
};
-&ipmi_kcs {
- status = "ok";
-};
-
&smb0 {
/include/ "amd-seattle-xgbe-b.dtsi"
};
--
2.17.1
next prev parent reply other threads:[~2019-11-26 11:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-26 11:43 [PATCH v2 0/8] dt: amd-seattle: update SMMU, PCIe and cache descriptions Ard Biesheuvel
2019-11-26 11:43 ` [PATCH v2 1/8] dt: amd-seattle: remove Husky platform Ard Biesheuvel
2019-11-26 11:43 ` [PATCH v2 2/8] dt: amd-seattle: remove Overdrive revision A0 support Ard Biesheuvel
2019-11-26 11:43 ` [PATCH v2 3/8] dt: amd-seattle: upgrade AMD Seattle XGBE to new SMMU binding Ard Biesheuvel
2019-11-26 11:43 ` [PATCH v2 4/8] dt: amd-seattle: fix PCIe legacy interrupt routing Ard Biesheuvel
2019-11-26 11:43 ` [PATCH v2 5/8] dt: amd-seattle: add a description of the PCIe SMMU Ard Biesheuvel
2019-11-26 11:43 ` [PATCH v2 6/8] dt: amd-seattle: add description of the SATA/CCP SMMUs Ard Biesheuvel
2019-12-03 14:10 ` Ard Biesheuvel
2019-12-03 14:33 ` Rob Herring
2019-11-26 11:43 ` Ard Biesheuvel [this message]
2019-11-26 11:43 ` [PATCH v2 8/8] dt: amd-seattle: add a description of the CPUs and caches Ard Biesheuvel
2019-11-26 11:59 ` Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191126114319.2755-8-ardb@kernel.org \
--to=ardb@kernel.org \
--cc=brijeshkumar.singh@amd.com \
--cc=devicetree@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=suravee.suthikulpanit@amd.com \
--cc=thomas.lendacky@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.