From: Ard Biesheuvel <ardb@kernel.org>
To: devicetree@vger.kernel.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
Brijesh Singh <brijeshkumar.singh@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v3 7/8] dt: amd-seattle: disable IPMI controller and some GPIO blocks on B0
Date: Tue, 3 Dec 2019 15:23:05 +0000 [thread overview]
Message-ID: <20191203152306.7839-8-ardb@kernel.org> (raw)
In-Reply-To: <20191203152306.7839-1-ardb@kernel.org>
Disable some peripherals that are not usable on B0 silicon based
Overdrives.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
index 8e341be9a399..4997a74aeb67 100644
--- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
+++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
@@ -36,14 +36,6 @@
status = "ok";
};
-&gpio2 {
- status = "ok";
-};
-
-&gpio3 {
- status = "ok";
-};
-
&gpio4 {
status = "ok";
};
@@ -79,10 +71,6 @@
};
};
-&ipmi_kcs {
- status = "ok";
-};
-
&smb0 {
/include/ "amd-seattle-xgbe-b.dtsi"
};
--
2.17.1
next prev parent reply other threads:[~2019-12-03 15:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-03 15:22 [PATCH v3 0/8] dt: amd-seattle: update SMMU, PCIe and cache descriptions Ard Biesheuvel
2019-12-03 15:22 ` [PATCH v3 1/8] dt: amd-seattle: remove Husky platform Ard Biesheuvel
2019-12-03 15:23 ` [PATCH v3 2/8] dt: amd-seattle: remove Overdrive revision A0 support Ard Biesheuvel
2019-12-03 15:23 ` [PATCH v3 3/8] dt: amd-seattle: upgrade AMD Seattle XGBE to new SMMU binding Ard Biesheuvel
2019-12-03 15:23 ` [PATCH v3 4/8] dt: amd-seattle: fix PCIe legacy interrupt routing Ard Biesheuvel
2019-12-03 15:23 ` [PATCH v3 5/8] dt: amd-seattle: add a description of the PCIe SMMU Ard Biesheuvel
2019-12-03 15:23 ` [PATCH v3 6/8] dt: amd-seattle: add description of the SATA/CCP SMMUs Ard Biesheuvel
2019-12-03 15:23 ` Ard Biesheuvel [this message]
2019-12-03 15:23 ` [PATCH v3 8/8] dt: amd-seattle: add a description of the CPUs and caches Ard Biesheuvel
2020-01-28 10:23 ` [PATCH v3 0/8] dt: amd-seattle: update SMMU, PCIe and cache descriptions Alexandru Elisei
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