Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/display/tgl: Fix the order of the step to turn transcoder clock off

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Dec 04, 2019 at 12:55:09PM -0800, José Roberto de Souza wrote:
> For TGL the step to turn off the transcoder clock was moved to after
> the complete shutdown of DDI. Only the MST slave transcoders should
> disable the clock before that.
> 
> v2:
> - Adding last_mst_stream to intel_mst_post_disable_dp, make code more
> easy to read and is similar to first_mst_stream in
> intel_mst_pre_enable_dp()(Ville's idea)
> - Calling intel_ddi_disable_pipe_clock() for GEN12+ right
> intel_disable_ddi_buf() as stated in BSpec(Ville)
> 
> BSpec: 49190
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c    | 10 +++++++++-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 20 +++++++++++++++-----
>  2 files changed, 24 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index ebcc7302706b..3cacb1e279c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3807,11 +3807,19 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
>  	 */
>  	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
>  
> -	if (!is_mst)
> +	if (INTEL_GEN(dev_priv) < 12 && !is_mst)
>  		intel_ddi_disable_pipe_clock(old_crtc_state);
>  
>  	intel_disable_ddi_buf(encoder, old_crtc_state);
>  
> +	/*
> +	 * From TGL spec: "If single stream or multi-stream master transcoder:
> +	 * Configure Transcoder Clock select to direct no clock to the
> +	 * transcoder"
> +	 */
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		intel_ddi_disable_pipe_clock(old_crtc_state);
> +

Memory is already a bit hazy, but yeah this seems like the right spot.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  	intel_edp_panel_vdd_on(intel_dp);
>  	intel_edp_panel_off(intel_dp);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index a1e4f4197a67..926e49f449a6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -235,8 +235,21 @@ static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
>  	struct intel_dp *intel_dp = &intel_dig_port->dp;
>  	struct intel_connector *connector =
>  		to_intel_connector(old_conn_state->connector);
> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +	bool last_mst_stream;
>  
> -	intel_ddi_disable_pipe_clock(old_crtc_state);
> +	intel_dp->active_mst_links--;
> +	last_mst_stream = intel_dp->active_mst_links == 0;
> +
> +	/*
> +	 * From TGL spec: "If multi-stream slave transcoder: Configure
> +	 * Transcoder Clock Select to direct no clock to the transcoder"
> +	 *
> +	 * From older GENs spec: "Configure Transcoder Clock Select to direct
> +	 * no clock to the transcoder"
> +	 */
> +	if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
> +		intel_ddi_disable_pipe_clock(old_crtc_state);
>  
>  	/* this can fail */
>  	drm_dp_check_act_status(&intel_dp->mst_mgr);
> @@ -252,13 +265,10 @@ static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
>  	drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
>  				     false);
>  
> -	intel_dp->active_mst_links--;
> -
>  	intel_mst->connector = NULL;
> -	if (intel_dp->active_mst_links == 0) {
> +	if (last_mst_stream)
>  		intel_dig_port->base.post_disable(&intel_dig_port->base,
>  						  old_crtc_state, NULL);
> -	}
>  
>  	DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
>  }
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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