From: Ramalingam C <ramalingam.c@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>,
Matthew Auld <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Create dumb buffer from LMEM
Date: Thu, 5 Dec 2019 18:32:40 +0530 [thread overview]
Message-ID: <20191205130240.GG25793@intel.com> (raw)
In-Reply-To: <157554841226.22727.12524170364084626029@skylake-alporthouse-com>
On 2019-12-05 at 12:20:12 +0000, Chris Wilson wrote:
> Quoting Matthew Auld (2019-12-05 12:12:19)
> > On Mon, 2 Dec 2019 at 06:55, Ramalingam C <ramalingam.c@intel.com> wrote:
> > >
> > > When LMEM is supported, dumb buffer preferred to be created from LMEM.
> > >
> > > v2:
> > > Parameters are reshuffled. [Chris]
> > > v3:
> > > s/region_id/mem_type
> > > v4:
> > > use the i915_gem_object_create_region [chris]
> > >
> > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > > cc: Matthew Auld <matthew.auld@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_gem.c | 14 +++++++++++---
> > > 1 file changed, 11 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > > index 61395b03443e..34e480c8293e 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > > @@ -44,6 +44,7 @@
> > > #include "gem/i915_gem_clflush.h"
> > > #include "gem/i915_gem_context.h"
> > > #include "gem/i915_gem_ioctls.h"
> > > +#include "gem/i915_gem_region.h"
> > > #include "gem/i915_gem_pm.h"
> > > #include "gt/intel_context.h"
> > > #include "gt/intel_engine_user.h"
> > > @@ -176,6 +177,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj,
> > > static int
> > > i915_gem_create(struct drm_file *file,
> > > struct drm_i915_private *dev_priv,
> > > + enum intel_memory_type mem_type,
> > > u64 *size_p,
> > > u32 *handle_p)
> > > {
> > > @@ -189,7 +191,8 @@ i915_gem_create(struct drm_file *file,
> > > return -EINVAL;
> > >
> > > /* Allocate the new object */
> > > - obj = i915_gem_object_create_shmem(dev_priv, size);
> > > + obj = i915_gem_object_create_region(intel_memory_region_lookup(dev_priv,
> > > + mem_type), size, 0);
> >
> > Reviewed-by: Matthew Auld <matthew.auld@intel.com>
> >
> > But how should we go about testing this?
> >
> > We would still need to clear the object(maybe I915_BO_ALLOC_CLEARED?)
> > in order to pass the IGTs. We also need to adjust dumb_buffer.c, since
> > that uses get_avail_ram_mb() for always_clear, but maybe we need the
> > query region uapi for that?
>
> Hmm. Questions over the maximum size for dumb buffer, maximum number of
> dumb buffers, etc, should be addressed to the dumb API. So some form of
> drmGetCap() ?
Chris, Is this suggestion to add this capability probing through a new IOCTL for
dumb APIs? Please clarify.
-Ram
>
> Note for merging, we need the lmem vm_fault implementation first.
> -Chris
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next prev parent reply other threads:[~2019-12-05 13:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-02 6:54 [PATCH v4 1/2] drm/i915: lookup for mem_region of a mem_type Ramalingam C
2019-12-02 6:54 ` [Intel-gfx] " Ramalingam C
2019-12-02 6:54 ` [PATCH v4 2/2] drm/i915: Create dumb buffer from LMEM Ramalingam C
2019-12-02 6:54 ` [Intel-gfx] " Ramalingam C
2019-12-05 12:12 ` Matthew Auld
2019-12-05 12:20 ` Chris Wilson
2019-12-05 13:02 ` Ramalingam C [this message]
2019-12-05 13:11 ` Chris Wilson
2019-12-09 11:57 ` Ramalingam C
2019-12-09 12:03 ` Chris Wilson
2019-12-09 12:05 ` Ramalingam C
2019-12-05 12:59 ` Ramalingam C
2019-12-02 7:01 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/2] drm/i915: lookup for mem_region of a mem_type Patchwork
2019-12-02 7:01 ` [Intel-gfx] " Patchwork
2019-12-02 7:31 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-12-02 7:31 ` [Intel-gfx] " Patchwork
2019-12-05 11:40 ` [Intel-gfx] [PATCH v4 1/2] " Matthew Auld
-- strict thread matches above, loose matches on Subject: below --
2019-11-06 16:08 Ramalingam C
2019-11-06 16:08 ` [Intel-gfx] [PATCH v4 2/2] drm/i915: Create dumb buffer from LMEM Ramalingam C
2019-11-06 16:08 ` Ramalingam C
2019-11-07 9:45 ` Chris Wilson
2019-11-07 9:45 ` Chris Wilson
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