From: kbuild test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: [sashal-linux-stable:queue-4.19 112/208] arch/arm64/net/bpf_jit_comp.c:633:9: error: implicit declaration of function 'bpf_jit_get_func_addr'; did you mean 'bpf_jit_binary_hdr'?
Date: Sun, 08 Dec 2019 09:12:06 +0800 [thread overview]
Message-ID: <201912080903.7S9DCGIB%lkp@intel.com> (raw)
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git queue-4.19
head: 2757e2f0189297425dc4f9af38477a41d7a2c0e5
commit: 636acf010bc7e8e5ff31886471a4c69d4ecc86fd [112/208] bpf, arm64: fix getting subprog addr from aux for calls
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 7.5.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 636acf010bc7e8e5ff31886471a4c69d4ecc86fd
# save the attached .config to linux build tree
GCC_VERSION=7.5.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
arch/arm64/net/bpf_jit_comp.c: In function 'build_insn':
>> arch/arm64/net/bpf_jit_comp.c:633:9: error: implicit declaration of function 'bpf_jit_get_func_addr'; did you mean 'bpf_jit_binary_hdr'? [-Werror=implicit-function-declaration]
ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
^~~~~~~~~~~~~~~~~~~~~
bpf_jit_binary_hdr
cc1: some warnings being treated as errors
vim +633 arch/arm64/net/bpf_jit_comp.c
381
382 switch (code) {
383 /* dst = src */
384 case BPF_ALU | BPF_MOV | BPF_X:
385 case BPF_ALU64 | BPF_MOV | BPF_X:
386 emit(A64_MOV(is64, dst, src), ctx);
387 break;
388 /* dst = dst OP src */
389 case BPF_ALU | BPF_ADD | BPF_X:
390 case BPF_ALU64 | BPF_ADD | BPF_X:
391 emit(A64_ADD(is64, dst, dst, src), ctx);
392 break;
393 case BPF_ALU | BPF_SUB | BPF_X:
394 case BPF_ALU64 | BPF_SUB | BPF_X:
395 emit(A64_SUB(is64, dst, dst, src), ctx);
396 break;
397 case BPF_ALU | BPF_AND | BPF_X:
398 case BPF_ALU64 | BPF_AND | BPF_X:
399 emit(A64_AND(is64, dst, dst, src), ctx);
400 break;
401 case BPF_ALU | BPF_OR | BPF_X:
402 case BPF_ALU64 | BPF_OR | BPF_X:
403 emit(A64_ORR(is64, dst, dst, src), ctx);
404 break;
405 case BPF_ALU | BPF_XOR | BPF_X:
406 case BPF_ALU64 | BPF_XOR | BPF_X:
407 emit(A64_EOR(is64, dst, dst, src), ctx);
408 break;
409 case BPF_ALU | BPF_MUL | BPF_X:
410 case BPF_ALU64 | BPF_MUL | BPF_X:
411 emit(A64_MUL(is64, dst, dst, src), ctx);
412 break;
413 case BPF_ALU | BPF_DIV | BPF_X:
414 case BPF_ALU64 | BPF_DIV | BPF_X:
415 case BPF_ALU | BPF_MOD | BPF_X:
416 case BPF_ALU64 | BPF_MOD | BPF_X:
417 switch (BPF_OP(code)) {
418 case BPF_DIV:
419 emit(A64_UDIV(is64, dst, dst, src), ctx);
420 break;
421 case BPF_MOD:
422 emit(A64_UDIV(is64, tmp, dst, src), ctx);
423 emit(A64_MUL(is64, tmp, tmp, src), ctx);
424 emit(A64_SUB(is64, dst, dst, tmp), ctx);
425 break;
426 }
427 break;
428 case BPF_ALU | BPF_LSH | BPF_X:
429 case BPF_ALU64 | BPF_LSH | BPF_X:
430 emit(A64_LSLV(is64, dst, dst, src), ctx);
431 break;
432 case BPF_ALU | BPF_RSH | BPF_X:
433 case BPF_ALU64 | BPF_RSH | BPF_X:
434 emit(A64_LSRV(is64, dst, dst, src), ctx);
435 break;
436 case BPF_ALU | BPF_ARSH | BPF_X:
437 case BPF_ALU64 | BPF_ARSH | BPF_X:
438 emit(A64_ASRV(is64, dst, dst, src), ctx);
439 break;
440 /* dst = -dst */
441 case BPF_ALU | BPF_NEG:
442 case BPF_ALU64 | BPF_NEG:
443 emit(A64_NEG(is64, dst, dst), ctx);
444 break;
445 /* dst = BSWAP##imm(dst) */
446 case BPF_ALU | BPF_END | BPF_FROM_LE:
447 case BPF_ALU | BPF_END | BPF_FROM_BE:
448 #ifdef CONFIG_CPU_BIG_ENDIAN
449 if (BPF_SRC(code) == BPF_FROM_BE)
450 goto emit_bswap_uxt;
451 #else /* !CONFIG_CPU_BIG_ENDIAN */
452 if (BPF_SRC(code) == BPF_FROM_LE)
453 goto emit_bswap_uxt;
454 #endif
455 switch (imm) {
456 case 16:
457 emit(A64_REV16(is64, dst, dst), ctx);
458 /* zero-extend 16 bits into 64 bits */
459 emit(A64_UXTH(is64, dst, dst), ctx);
460 break;
461 case 32:
462 emit(A64_REV32(is64, dst, dst), ctx);
463 /* upper 32 bits already cleared */
464 break;
465 case 64:
466 emit(A64_REV64(dst, dst), ctx);
467 break;
468 }
469 break;
470 emit_bswap_uxt:
471 switch (imm) {
472 case 16:
473 /* zero-extend 16 bits into 64 bits */
474 emit(A64_UXTH(is64, dst, dst), ctx);
475 break;
476 case 32:
477 /* zero-extend 32 bits into 64 bits */
478 emit(A64_UXTW(is64, dst, dst), ctx);
479 break;
480 case 64:
481 /* nop */
482 break;
483 }
484 break;
485 /* dst = imm */
486 case BPF_ALU | BPF_MOV | BPF_K:
487 case BPF_ALU64 | BPF_MOV | BPF_K:
488 emit_a64_mov_i(is64, dst, imm, ctx);
489 break;
490 /* dst = dst OP imm */
491 case BPF_ALU | BPF_ADD | BPF_K:
492 case BPF_ALU64 | BPF_ADD | BPF_K:
493 emit_a64_mov_i(is64, tmp, imm, ctx);
494 emit(A64_ADD(is64, dst, dst, tmp), ctx);
495 break;
496 case BPF_ALU | BPF_SUB | BPF_K:
497 case BPF_ALU64 | BPF_SUB | BPF_K:
498 emit_a64_mov_i(is64, tmp, imm, ctx);
499 emit(A64_SUB(is64, dst, dst, tmp), ctx);
500 break;
501 case BPF_ALU | BPF_AND | BPF_K:
502 case BPF_ALU64 | BPF_AND | BPF_K:
503 emit_a64_mov_i(is64, tmp, imm, ctx);
504 emit(A64_AND(is64, dst, dst, tmp), ctx);
505 break;
506 case BPF_ALU | BPF_OR | BPF_K:
507 case BPF_ALU64 | BPF_OR | BPF_K:
508 emit_a64_mov_i(is64, tmp, imm, ctx);
509 emit(A64_ORR(is64, dst, dst, tmp), ctx);
510 break;
511 case BPF_ALU | BPF_XOR | BPF_K:
512 case BPF_ALU64 | BPF_XOR | BPF_K:
513 emit_a64_mov_i(is64, tmp, imm, ctx);
514 emit(A64_EOR(is64, dst, dst, tmp), ctx);
515 break;
516 case BPF_ALU | BPF_MUL | BPF_K:
517 case BPF_ALU64 | BPF_MUL | BPF_K:
518 emit_a64_mov_i(is64, tmp, imm, ctx);
519 emit(A64_MUL(is64, dst, dst, tmp), ctx);
520 break;
521 case BPF_ALU | BPF_DIV | BPF_K:
522 case BPF_ALU64 | BPF_DIV | BPF_K:
523 emit_a64_mov_i(is64, tmp, imm, ctx);
524 emit(A64_UDIV(is64, dst, dst, tmp), ctx);
525 break;
526 case BPF_ALU | BPF_MOD | BPF_K:
527 case BPF_ALU64 | BPF_MOD | BPF_K:
528 emit_a64_mov_i(is64, tmp2, imm, ctx);
529 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
530 emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
531 emit(A64_SUB(is64, dst, dst, tmp), ctx);
532 break;
533 case BPF_ALU | BPF_LSH | BPF_K:
534 case BPF_ALU64 | BPF_LSH | BPF_K:
535 emit(A64_LSL(is64, dst, dst, imm), ctx);
536 break;
537 case BPF_ALU | BPF_RSH | BPF_K:
538 case BPF_ALU64 | BPF_RSH | BPF_K:
539 emit(A64_LSR(is64, dst, dst, imm), ctx);
540 break;
541 case BPF_ALU | BPF_ARSH | BPF_K:
542 case BPF_ALU64 | BPF_ARSH | BPF_K:
543 emit(A64_ASR(is64, dst, dst, imm), ctx);
544 break;
545
546 /* JUMP off */
547 case BPF_JMP | BPF_JA:
548 jmp_offset = bpf2a64_offset(i + off, i, ctx);
549 check_imm26(jmp_offset);
550 emit(A64_B(jmp_offset), ctx);
551 break;
552 /* IF (dst COND src) JUMP off */
553 case BPF_JMP | BPF_JEQ | BPF_X:
554 case BPF_JMP | BPF_JGT | BPF_X:
555 case BPF_JMP | BPF_JLT | BPF_X:
556 case BPF_JMP | BPF_JGE | BPF_X:
557 case BPF_JMP | BPF_JLE | BPF_X:
558 case BPF_JMP | BPF_JNE | BPF_X:
559 case BPF_JMP | BPF_JSGT | BPF_X:
560 case BPF_JMP | BPF_JSLT | BPF_X:
561 case BPF_JMP | BPF_JSGE | BPF_X:
562 case BPF_JMP | BPF_JSLE | BPF_X:
563 emit(A64_CMP(1, dst, src), ctx);
564 emit_cond_jmp:
565 jmp_offset = bpf2a64_offset(i + off, i, ctx);
566 check_imm19(jmp_offset);
567 switch (BPF_OP(code)) {
568 case BPF_JEQ:
569 jmp_cond = A64_COND_EQ;
570 break;
571 case BPF_JGT:
572 jmp_cond = A64_COND_HI;
573 break;
574 case BPF_JLT:
575 jmp_cond = A64_COND_CC;
576 break;
577 case BPF_JGE:
578 jmp_cond = A64_COND_CS;
579 break;
580 case BPF_JLE:
581 jmp_cond = A64_COND_LS;
582 break;
583 case BPF_JSET:
584 case BPF_JNE:
585 jmp_cond = A64_COND_NE;
586 break;
587 case BPF_JSGT:
588 jmp_cond = A64_COND_GT;
589 break;
590 case BPF_JSLT:
591 jmp_cond = A64_COND_LT;
592 break;
593 case BPF_JSGE:
594 jmp_cond = A64_COND_GE;
595 break;
596 case BPF_JSLE:
597 jmp_cond = A64_COND_LE;
598 break;
599 default:
600 return -EFAULT;
601 }
602 emit(A64_B_(jmp_cond, jmp_offset), ctx);
603 break;
604 case BPF_JMP | BPF_JSET | BPF_X:
605 emit(A64_TST(1, dst, src), ctx);
606 goto emit_cond_jmp;
607 /* IF (dst COND imm) JUMP off */
608 case BPF_JMP | BPF_JEQ | BPF_K:
609 case BPF_JMP | BPF_JGT | BPF_K:
610 case BPF_JMP | BPF_JLT | BPF_K:
611 case BPF_JMP | BPF_JGE | BPF_K:
612 case BPF_JMP | BPF_JLE | BPF_K:
613 case BPF_JMP | BPF_JNE | BPF_K:
614 case BPF_JMP | BPF_JSGT | BPF_K:
615 case BPF_JMP | BPF_JSLT | BPF_K:
616 case BPF_JMP | BPF_JSGE | BPF_K:
617 case BPF_JMP | BPF_JSLE | BPF_K:
618 emit_a64_mov_i(1, tmp, imm, ctx);
619 emit(A64_CMP(1, dst, tmp), ctx);
620 goto emit_cond_jmp;
621 case BPF_JMP | BPF_JSET | BPF_K:
622 emit_a64_mov_i(1, tmp, imm, ctx);
623 emit(A64_TST(1, dst, tmp), ctx);
624 goto emit_cond_jmp;
625 /* function call */
626 case BPF_JMP | BPF_CALL:
627 {
628 const u8 r0 = bpf2a64[BPF_REG_0];
629 bool func_addr_fixed;
630 u64 func_addr;
631 int ret;
632
> 633 ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
634 &func_addr, &func_addr_fixed);
635 if (ret < 0)
636 return ret;
637 if (func_addr_fixed)
638 /* We can use optimized emission here. */
639 emit_a64_mov_i64(tmp, func_addr, ctx);
640 else
641 emit_addr_mov_i64(tmp, func_addr, ctx);
642 emit(A64_BLR(tmp), ctx);
643 emit(A64_MOV(1, r0, A64_R(0)), ctx);
644 break;
645 }
646 /* tail call */
647 case BPF_JMP | BPF_TAIL_CALL:
648 if (emit_bpf_tail_call(ctx))
649 return -EFAULT;
650 break;
651 /* function return */
652 case BPF_JMP | BPF_EXIT:
653 /* Optimization: when last instruction is EXIT,
654 simply fallthrough to epilogue. */
655 if (i == ctx->prog->len - 1)
656 break;
657 jmp_offset = epilogue_offset(ctx);
658 check_imm26(jmp_offset);
659 emit(A64_B(jmp_offset), ctx);
660 break;
661
662 /* dst = imm64 */
663 case BPF_LD | BPF_IMM | BPF_DW:
664 {
665 const struct bpf_insn insn1 = insn[1];
666 u64 imm64;
667
668 imm64 = (u64)insn1.imm << 32 | (u32)imm;
669 emit_a64_mov_i64(dst, imm64, ctx);
670
671 return 1;
672 }
673
674 /* LDX: dst = *(size *)(src + off) */
675 case BPF_LDX | BPF_MEM | BPF_W:
676 case BPF_LDX | BPF_MEM | BPF_H:
677 case BPF_LDX | BPF_MEM | BPF_B:
678 case BPF_LDX | BPF_MEM | BPF_DW:
679 emit_a64_mov_i(1, tmp, off, ctx);
680 switch (BPF_SIZE(code)) {
681 case BPF_W:
682 emit(A64_LDR32(dst, src, tmp), ctx);
683 break;
684 case BPF_H:
685 emit(A64_LDRH(dst, src, tmp), ctx);
686 break;
687 case BPF_B:
688 emit(A64_LDRB(dst, src, tmp), ctx);
689 break;
690 case BPF_DW:
691 emit(A64_LDR64(dst, src, tmp), ctx);
692 break;
693 }
694 break;
695
696 /* ST: *(size *)(dst + off) = imm */
697 case BPF_ST | BPF_MEM | BPF_W:
698 case BPF_ST | BPF_MEM | BPF_H:
699 case BPF_ST | BPF_MEM | BPF_B:
700 case BPF_ST | BPF_MEM | BPF_DW:
701 /* Load imm to a register then store it */
702 emit_a64_mov_i(1, tmp2, off, ctx);
703 emit_a64_mov_i(1, tmp, imm, ctx);
704 switch (BPF_SIZE(code)) {
705 case BPF_W:
706 emit(A64_STR32(tmp, dst, tmp2), ctx);
707 break;
708 case BPF_H:
709 emit(A64_STRH(tmp, dst, tmp2), ctx);
710 break;
711 case BPF_B:
712 emit(A64_STRB(tmp, dst, tmp2), ctx);
713 break;
714 case BPF_DW:
715 emit(A64_STR64(tmp, dst, tmp2), ctx);
716 break;
717 }
718 break;
719
720 /* STX: *(size *)(dst + off) = src */
721 case BPF_STX | BPF_MEM | BPF_W:
722 case BPF_STX | BPF_MEM | BPF_H:
723 case BPF_STX | BPF_MEM | BPF_B:
724 case BPF_STX | BPF_MEM | BPF_DW:
725 emit_a64_mov_i(1, tmp, off, ctx);
726 switch (BPF_SIZE(code)) {
727 case BPF_W:
728 emit(A64_STR32(src, dst, tmp), ctx);
729 break;
730 case BPF_H:
731 emit(A64_STRH(src, dst, tmp), ctx);
732 break;
733 case BPF_B:
734 emit(A64_STRB(src, dst, tmp), ctx);
735 break;
736 case BPF_DW:
737 emit(A64_STR64(src, dst, tmp), ctx);
738 break;
739 }
740 break;
741
742 /* STX XADD: lock *(u32 *)(dst + off) += src */
743 case BPF_STX | BPF_XADD | BPF_W:
744 /* STX XADD: lock *(u64 *)(dst + off) += src */
745 case BPF_STX | BPF_XADD | BPF_DW:
746 if (!off) {
747 reg = dst;
748 } else {
749 emit_a64_mov_i(1, tmp, off, ctx);
750 emit(A64_ADD(1, tmp, tmp, dst), ctx);
751 reg = tmp;
752 }
753 if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS)) {
754 emit(A64_STADD(isdw, reg, src), ctx);
755 } else {
756 emit(A64_LDXR(isdw, tmp2, reg), ctx);
757 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx);
758 emit(A64_STXR(isdw, tmp2, reg, tmp3), ctx);
759 jmp_offset = -3;
760 check_imm19(jmp_offset);
761 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
762 }
763 break;
764
765 default:
766 pr_err_once("unknown opcode %02x\n", code);
767 return -EINVAL;
768 }
769
770 return 0;
771 }
772
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
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