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From: Manasi Navare <manasi.d.navare@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsc: clarify DSC support for pipe A on ICL
Date: Wed, 11 Dec 2019 13:43:03 -0800	[thread overview]
Message-ID: <20191211214302.GD12192@intel.com> (raw)
In-Reply-To: <f00e9d55ce20b256177222588780c660aa587cc3.1576081155.git.jani.nikula@intel.com>

On Wed, Dec 11, 2019 at 06:23:47PM +0200, Jani Nikula wrote:
> The check for cpu_transcoder != TRANSCODER_A is more magic than
> necessary, and potentially misleading. Before TGL, DSC is supported on
> pipe A if, and only if, it's used with eDP or DSI transcoders. No
> functional changes.
>

Hmm, so we could still use PIPE_A but if its eDP or DSI it would use
TRANSCODER_EDP or TRANSCODER_DSI and that should still work?

So its simpler to say that if it is PIPE_A && transcoder_A then it doesnt
support DSC?
Wouldnt it be simpler to change the condition to :
if (INTEL_GEN(i915) >= 10 && !(pipe_A && transcode_A)
     return true;

Regards
Manasi
 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index e6f60be9ee84..41718f721484 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -337,7 +337,10 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
>  bool intel_dsc_source_support(struct intel_encoder *encoder,
>  			      const struct intel_crtc_state *crtc_state)
>  {
> +	const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	enum pipe pipe = crtc->pipe;
>  
>  	if (!INTEL_INFO(i915)->display.has_dsc)
>  		return false;
> @@ -347,7 +350,10 @@ bool intel_dsc_source_support(struct intel_encoder *encoder,
>  		return true;
>  
>  	if (INTEL_GEN(i915) >= 10 &&
> -	    crtc_state->cpu_transcoder != TRANSCODER_A)
> +	    (pipe != PIPE_A ||
> +	     (cpu_transcoder == TRANSCODER_EDP ||
> +	      cpu_transcoder == TRANSCODER_DSI_0 ||
> +	      cpu_transcoder == TRANSCODER_DSI_1)))
>  		return true;
>  
>  	return false;
> -- 
> 2.20.1
> 
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  reply	other threads:[~2019-12-11 21:41 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-11 16:23 [Intel-gfx] [PATCH 0/2] drm/i915/dsc: fixes for ICL DSI DSC Jani Nikula
2019-12-11 16:23 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsc: fix DSC register selection for ICL DSI transcoders Jani Nikula
2019-12-11 22:08   ` Manasi Navare
2019-12-12  7:18     ` Jani Nikula
2019-12-12 22:05       ` Manasi Navare
2019-12-13  0:53         ` Manasi Navare
2019-12-11 16:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsc: clarify DSC support for pipe A on ICL Jani Nikula
2019-12-11 21:43   ` Manasi Navare [this message]
2019-12-12  7:27     ` Jani Nikula
2019-12-12  0:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsc: fixes for ICL DSI DSC Patchwork
2019-12-12  9:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsc: fixes for ICL DSI DSC (rev2) Patchwork
2019-12-12 11:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-12 13:47 ` [Intel-gfx] [PATCH 3/2] drm/i915/dsc: fix DSC power domains for DSI Jani Nikula
2019-12-19 10:49   ` Kulkarni, Vandita
2019-12-19 13:26     ` Jani Nikula
2019-12-12 13:48 ` [Intel-gfx] [PATCH 0/2] drm/i915/dsc: fixes for ICL DSI DSC Jani Nikula
2019-12-12 14:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsc: fixes for ICL DSI DSC (rev3) Patchwork
2019-12-13  4:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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