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diff for duplicates of <20191216151419.GL2871@hirez.programming.kicks-ass.net>

diff --git a/a/1.txt b/N1/1.txt
index 74e8798..2f0a5c3 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -33,14 +33,14 @@ index c44ef15866a3..98de654b79b3 100644
 @@ -400,10 +400,6 @@ config MMU_GATHER_RCU_TABLE_FREE
  	bool
  	select MMU_GATHER_TABLE_FREE
- 
+
 -config MMU_GATHER_NO_TABLE_INVALIDATE
 -	bool
 -	depends on MMU_GATHER_RCU_TABLE_FREE
 -
  config MMU_GATHER_PAGE_SIZE
  	bool
- 
+
 diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
 index 3dea4c8d39f2..2ddf24822d5b 100644
 --- a/arch/powerpc/Kconfig
@@ -72,7 +72,7 @@ index a2f3fa61ee36..ac8e74a96122 100644
 @@ -28,6 +28,12 @@ void flush_tlb_pending(void);
  #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
  #define tlb_flush(tlb)	flush_tlb_pending()
- 
+
 +/*
 + * SPARC64's hardware TLB fill does not use the Linux page-tables
 + * and therefore we don't need a TLBI when freeing page-table pages.
@@ -80,7 +80,7 @@ index a2f3fa61ee36..ac8e74a96122 100644
 +#define tlb_needs_table_invalidate()	(false)
 +
  #include <asm-generic/tlb.h>
- 
+
  #endif /* _SPARC64_TLB_H */
 diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
 index fe0ea6ff3636..4108d6d18ca5 100644
@@ -101,9 +101,9 @@ index fe0ea6ff3636..4108d6d18ca5 100644
   *
   *  Use this if your architecture lacks an efficient flush_tlb_range().
 @@ -203,6 +196,24 @@ extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
- 
+
  #endif /* CONFIG_MMU_GATHER_TABLE_FREE */
- 
+
 +#ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
 +
 +/*
@@ -150,5 +150,5 @@ index 9d103031568d..a3538cb2bcbe 100644
 +		tlb_flush_mmu_tlbonly(tlb);
 +	}
  }
- 
+
  static void tlb_remove_table_one(void *table)
diff --git a/a/content_digest b/N1/content_digest
index e61f0ce..8fbcfd7 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -65,14 +65,14 @@
  "@@ -400,10 +400,6 @@ config MMU_GATHER_RCU_TABLE_FREE\n"
  " \tbool\n"
  " \tselect MMU_GATHER_TABLE_FREE\n"
- " \n"
+ "\n"
  "-config MMU_GATHER_NO_TABLE_INVALIDATE\n"
  "-\tbool\n"
  "-\tdepends on MMU_GATHER_RCU_TABLE_FREE\n"
  "-\n"
  " config MMU_GATHER_PAGE_SIZE\n"
  " \tbool\n"
- " \n"
+ "\n"
  "diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig\n"
  "index 3dea4c8d39f2..2ddf24822d5b 100644\n"
  "--- a/arch/powerpc/Kconfig\n"
@@ -104,7 +104,7 @@
  "@@ -28,6 +28,12 @@ void flush_tlb_pending(void);\n"
  " #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)\n"
  " #define tlb_flush(tlb)\tflush_tlb_pending()\n"
- " \n"
+ "\n"
  "+/*\n"
  "+ * SPARC64's hardware TLB fill does not use the Linux page-tables\n"
  "+ * and therefore we don't need a TLBI when freeing page-table pages.\n"
@@ -112,7 +112,7 @@
  "+#define tlb_needs_table_invalidate()\t(false)\n"
  "+\n"
  " #include <asm-generic/tlb.h>\n"
- " \n"
+ "\n"
  " #endif /* _SPARC64_TLB_H */\n"
  "diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h\n"
  "index fe0ea6ff3636..4108d6d18ca5 100644\n"
@@ -133,9 +133,9 @@
  "  *\n"
  "  *  Use this if your architecture lacks an efficient flush_tlb_range().\n"
  "@@ -203,6 +196,24 @@ extern void tlb_remove_table(struct mmu_gather *tlb, void *table);\n"
- " \n"
+ "\n"
  " #endif /* CONFIG_MMU_GATHER_TABLE_FREE */\n"
- " \n"
+ "\n"
  "+#ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE\n"
  "+\n"
  "+/*\n"
@@ -182,7 +182,7 @@
  "+\t\ttlb_flush_mmu_tlbonly(tlb);\n"
  "+\t}\n"
  " }\n"
- " \n"
+ "\n"
   static void tlb_remove_table_one(void *table)
 
-9b46ef1fb8851978c8b86c04c2008c85d575cdc3b5a0078ccd7d5bccd8170ed5
+5a79017bea6df2362316352adc14c961f5106dae6f434b3d2c492d6a19a6000c

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