From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: "Jason Cooper" <jason@lakedaemon.net>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Marek Behún" <marek.behun@nic.cz>,
"Hubert Feurstein" <h.feurstein@gmail.com>,
"Denis Odintsov" <d.odintsov@traviangames.com>,
linux-arm-kernel@lists.infradead.org,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH] arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
Date: Sat, 21 Dec 2019 17:00:40 +0100 [thread overview]
Message-ID: <20191221160040.GK30801@lunn.ch> (raw)
In-Reply-To: <18a7fd3e75a172a7bca9feecfb8a77ecb802d8af.1576751325.git.baruch@tkos.co.il>
On Thu, Dec 19, 2019 at 12:28:45PM +0200, Baruch Siach wrote:
> Explicitly set the switch cpu (upstream) port phy-mode and managed
> properties. This fixes the Marvell 88E6141 switch serdes configuration
> with the recently enabled phylink layer.
>
> Fixes: a612083327 ("arm64: dts: add support for SolidRun Clearfog GT 8K")
> Reported-by: Denis Odintsov <d.odintsov@traviangames.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
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next prev parent reply other threads:[~2019-12-21 16:01 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-19 10:28 [PATCH] arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node Baruch Siach
2019-12-21 16:00 ` Andrew Lunn [this message]
2020-01-08 10:00 ` Gregory CLEMENT
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