From: kan.liang@linux.intel.com
To: peterz@infradead.org, acme@redhat.com, mingo@kernel.org,
linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com,
Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V5 RESEND 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS
Date: Mon, 6 Jan 2020 12:29:07 -0800 [thread overview]
Message-ID: <20200106202919.2943-3-kan.liang@linux.intel.com> (raw)
In-Reply-To: <20200106202919.2943-1-kan.liang@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
TOPDOWN.SLOTS(0x0400) is not a generic event. It is only available on
fixed counter3.
Don't extend its mask to generic counters.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
No changes since V4
arch/x86/events/intel/core.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index dc64b16e6b71..b61e81316c2b 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5118,12 +5118,14 @@ __init int intel_pmu_init(void)
if (x86_pmu.event_constraints) {
/*
- * event on fixed counter2 (REF_CYCLES) only works on this
+ * event on fixed counter2 (REF_CYCLES) and
+ * fixed counter3 (TOPDOWN.SLOTS) only work on this
* counter, so do not extend mask to generic counters
*/
for_each_event_constraint(c, x86_pmu.event_constraints) {
if (c->cmask == FIXED_EVENT_FLAGS
- && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) {
+ && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES
+ && c->idxmsk64 != INTEL_PMC_MSK_FIXED_SLOTS) {
c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1;
}
c->idxmsk64 &=
--
2.17.1
next prev parent reply other threads:[~2020-01-06 20:31 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-06 20:29 [PATCH V5 RESEND 00/14] TopDown metrics support for Icelake kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 01/14] perf/x86/intel: Introduce the fourth fixed counter kan.liang
2020-01-06 20:29 ` kan.liang [this message]
2020-01-06 20:29 ` [PATCH V5 RESEND 03/14] perf/x86/intel: Move BTS index to 47 kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 04/14] perf/x86/intel: Basic support for metrics counters kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 05/14] perf/x86/intel: Fix the name of perf capabilities for perf METRICS kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 06/14] perf/x86/intel: Support hardware TopDown metrics kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 07/14] perf/x86/intel: Support per thread RDPMC " kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 08/14] perf/x86/intel: Export TopDown events for Icelake kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 09/14] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 10/14] perf/x86/intel: Name global status bit in NMI handler kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 11/14] perf/x86: Use event_base_rdpmc for RDPMC userspace support kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 12/14] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 13/14] perf, tools, stat: Check Topdown Metric group kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 14/14] perf, tools: Add documentation for topdown metrics kan.liang
2020-01-10 13:17 ` [PATCH V5 RESEND 00/14] TopDown metrics support for Icelake Peter Zijlstra
2020-04-20 16:00 ` Stephane Eranian
2020-04-20 17:02 ` Peter Zijlstra
-- strict thread matches above, loose matches on Subject: below --
2019-12-03 14:11 kan.liang
2019-12-03 14:12 ` [PATCH V5 RESEND 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS kan.liang
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